diff options
Diffstat (limited to 'target/hppa')
| -rw-r--r-- | target/hppa/cpu.c | 6 | ||||
| -rw-r--r-- | target/hppa/cpu.h | 1 | ||||
| -rw-r--r-- | target/hppa/mem_helper.c | 35 | ||||
| -rw-r--r-- | target/hppa/op_helper.c | 6 |
4 files changed, 24 insertions, 24 deletions
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index e1f252cc45..14e17fa9aa 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -110,11 +110,7 @@ void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr, CPUHPPAState *env = &cpu->env; cs->exception_index = EXCP_UNALIGN; - if (env->psw & PSW_Q) { - /* ??? Needs tweaking for hppa64. */ - env->cr[CR_IOR] = addr; - env->cr[CR_ISR] = addr >> 32; - } + hppa_set_ior_and_isr(env, addr, MMU_IDX_MMU_DISABLED(mmu_idx)); cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index fd659ca88b..6a153405d2 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -385,6 +385,7 @@ void hppa_cpu_dump_state(CPUState *cs, FILE *f, int); #ifndef CONFIG_USER_ONLY void hppa_ptlbe(CPUHPPAState *env); hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr); +void hppa_set_ior_and_isr(CPUHPPAState *env, vaddr addr, bool mmu_disabled); bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 08abd1a9f9..4fcc612754 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -55,8 +55,14 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr) /* I/O address space */ addr = (int32_t)addr; } else { - /* PDC address space */ - addr &= MAKE_64BIT_MASK(0, 24); + /* + * PDC address space: + * Figures H-10 and H-11 of the parisc2.0 spec do not specify + * where to map into the 64-bit PDC address space. + * We map with an offset which equals the 32-bit address, which + * is what can be seen on physical machines too. + */ + addr = (uint32_t)addr; addr |= -1ull << (TARGET_PHYS_ADDR_SPACE_BITS - 4); } return addr; @@ -299,14 +305,8 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) return excp == EXCP_DTLB_MISS ? -1 : phys; } -G_NORETURN static void -raise_exception_with_ior(CPUHPPAState *env, int excp, uintptr_t retaddr, - vaddr addr, bool mmu_disabled) +void hppa_set_ior_and_isr(CPUHPPAState *env, vaddr addr, bool mmu_disabled) { - CPUState *cs = env_cpu(env); - - cs->exception_index = excp; - if (env->psw & PSW_Q) { /* * For pa1.x, the offset and space never overlap, and so we @@ -333,16 +333,23 @@ raise_exception_with_ior(CPUHPPAState *env, int excp, uintptr_t retaddr, */ uint64_t b; - cpu_restore_state(cs, retaddr); - - b = env->gr[env->unwind_breg]; + b = env->unwind_breg ? env->gr[env->unwind_breg] : 0; b >>= (env->psw & PSW_W ? 62 : 30); env->cr[CR_IOR] |= b << 62; - - cpu_loop_exit(cs); } } } +} + +G_NORETURN static void +raise_exception_with_ior(CPUHPPAState *env, int excp, uintptr_t retaddr, + vaddr addr, bool mmu_disabled) +{ + CPUState *cs = env_cpu(env); + + cs->exception_index = excp; + hppa_set_ior_and_isr(env, addr, mmu_disabled); + cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 7f607c3afd..ce15469465 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -351,11 +351,7 @@ target_ulong HELPER(probe)(CPUHPPAState *env, target_ulong addr, excp = hppa_get_physical_address(env, addr, mmu_idx, 0, &phys, &prot, NULL); if (excp >= 0) { - if (env->psw & PSW_Q) { - /* ??? Needs tweaking for hppa64. */ - env->cr[CR_IOR] = addr; - env->cr[CR_ISR] = addr >> 32; - } + hppa_set_ior_and_isr(env, addr, MMU_IDX_MMU_DISABLED(mmu_idx)); if (excp == EXCP_DTLB_MISS) { excp = EXCP_NA_DTLB_MISS; } |