diff options
| -rw-r--r-- | target-i386/cpu.h | 66 | ||||
| -rw-r--r-- | target-i386/exec.h | 19 | ||||
| -rw-r--r-- | target-i386/helper.c | 8 | ||||
| -rw-r--r-- | target-i386/op_helper.c | 34 |
4 files changed, 56 insertions, 71 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index eed1f62c7e..ce9b3fef8d 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -720,10 +720,12 @@ static inline void cpu_x86_set_cpl(CPUX86State *s, int cpl) #endif } +/* op_helper.c */ /* used for debug or cpu save/restore */ void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, CPU86_LDouble f); CPU86_LDouble cpu_set_fp80(uint64_t mant, uint16_t upper); +/* cpu-exec.c */ /* the following helpers are only usable in user mode simulation as they can trigger unexpected exceptions */ void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector); @@ -735,24 +737,51 @@ void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32); is returned if the signal was handled by the virtual CPU. */ int cpu_x86_signal_handler(int host_signum, void *pinfo, void *puc); + +/* helper.c */ +int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, + int is_write, int mmu_idx, int is_softmmu); void cpu_x86_set_a20(CPUX86State *env, int a20_state); +void cpu_x86_cpuid(CPUX86State *env, uint32_t index, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx); -uint64_t cpu_get_tsc(CPUX86State *env); +static inline int hw_breakpoint_enabled(unsigned long dr7, int index) +{ + return (dr7 >> (index * 2)) & 3; +} +static inline int hw_breakpoint_type(unsigned long dr7, int index) +{ + return (dr7 >> (DR7_TYPE_SHIFT + (index * 2))) & 3; +} + +static inline int hw_breakpoint_len(unsigned long dr7, int index) +{ + int len = ((dr7 >> (DR7_LEN_SHIFT + (index * 2))) & 3); + return (len == 2) ? 8 : len + 1; +} + +void hw_breakpoint_insert(CPUX86State *env, int index); +void hw_breakpoint_remove(CPUX86State *env, int index); +int check_hw_breakpoints(CPUX86State *env, int force_dr6_update); + +/* will be suppressed */ +void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0); +void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3); +void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4); + +/* hw/apic.c */ void cpu_set_apic_base(CPUX86State *env, uint64_t val); uint64_t cpu_get_apic_base(CPUX86State *env); void cpu_set_apic_tpr(CPUX86State *env, uint8_t val); #ifndef NO_CPU_IO_DEFS uint8_t cpu_get_apic_tpr(CPUX86State *env); #endif -void cpu_smm_update(CPUX86State *env); -/* will be suppressed */ -void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0); - -void cpu_x86_cpuid(CPUX86State *env, uint32_t index, - uint32_t *eax, uint32_t *ebx, - uint32_t *ecx, uint32_t *edx); +/* hw/pc.c */ +void cpu_smm_update(CPUX86State *env); +uint64_t cpu_get_tsc(CPUX86State *env); /* used to debug */ #define X86_DUMP_FPU 0x0001 /* dump FPU state too */ @@ -787,6 +816,7 @@ static inline int cpu_mmu_index (CPUState *env) return (env->hflags & HF_CPL_MASK) == 3 ? 1 : 0; } +/* translate.c */ void optimize_flags_init(void); typedef struct CCTable { @@ -803,26 +833,6 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) } #endif -static inline int hw_breakpoint_enabled(unsigned long dr7, int index) -{ - return (dr7 >> (index * 2)) & 3; -} - -static inline int hw_breakpoint_type(unsigned long dr7, int index) -{ - return (dr7 >> (DR7_TYPE_SHIFT + (index * 2))) & 3; -} - -static inline int hw_breakpoint_len(unsigned long dr7, int index) -{ - int len = ((dr7 >> (DR7_LEN_SHIFT + (index * 2))) & 3); - return (len == 2) ? 8 : len + 1; -} - -void hw_breakpoint_insert(CPUState *env, int index); -void hw_breakpoint_remove(CPUState *env, int index); -int check_hw_breakpoints(CPUState *env, int force_dr6_update); - #include "cpu-all.h" #include "exec-all.h" diff --git a/target-i386/exec.h b/target-i386/exec.h index 36631665ed..4d97a1bc69 100644 --- a/target-i386/exec.h +++ b/target-i386/exec.h @@ -57,18 +57,11 @@ register struct CPUX86State *env asm(AREG0); #include "cpu.h" #include "exec-all.h" -void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3); -void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4); -int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, - int is_write, int mmu_idx, int is_softmmu); -void __hidden cpu_lock(void); -void __hidden cpu_unlock(void); +/* op_helper.c */ void do_interrupt(int intno, int is_int, int error_code, target_ulong next_eip, int is_hw); void do_interrupt_user(int intno, int is_int, int error_code, target_ulong next_eip); -void raise_interrupt(int intno, int is_int, int error_code, - int next_eip_addend); void raise_exception_err(int exception_index, int error_code); void raise_exception(int exception_index); void do_smm_enter(void); @@ -274,16 +267,6 @@ static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr) #define FPUC_EM 0x3f -extern const CPU86_LDouble f15rk[7]; - -void fpu_raise_exception(void); -void restore_native_fp_state(CPUState *env); -void save_native_fp_state(CPUState *env); - -extern const uint8_t parity_table[256]; -extern const uint8_t rclw_table[32]; -extern const uint8_t rclb_table[32]; - static inline uint32_t compute_eflags(void) { return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK); diff --git a/target-i386/helper.c b/target-i386/helper.c index f2d91df0f6..7d3321adea 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -27,10 +27,8 @@ #include "cpu.h" #include "exec-all.h" -#include "svm.h" #include "qemu-common.h" #include "kvm.h" -#include "helper.h" //#define DEBUG_MMU @@ -849,12 +847,6 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4) env->cr[4] = new_cr4; } -/* XXX: also flush 4MB pages */ -void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr) -{ - tlb_flush_page(env, addr); -} - #if defined(CONFIG_USER_ONLY) int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index d32a6a3d97..52fee3d43f 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -19,6 +19,7 @@ */ #define CPU_NO_GLOBAL_REGS #include "exec.h" +#include "exec-all.h" #include "host-utils.h" //#define DEBUG_PCALL @@ -32,7 +33,7 @@ do {\ } while (0) #endif -const uint8_t parity_table[256] = { +static const uint8_t parity_table[256] = { CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, @@ -68,7 +69,7 @@ const uint8_t parity_table[256] = { }; /* modulo 17 table */ -const uint8_t rclw_table[32] = { +static const uint8_t rclw_table[32] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15, 16, 0, 1, 2, 3, 4, 5, 6, @@ -76,14 +77,14 @@ const uint8_t rclw_table[32] = { }; /* modulo 9 table */ -const uint8_t rclb_table[32] = { +static const uint8_t rclb_table[32] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 0, 1, 2, 3, 4, 5, 6, 7, 8, 0, 1, 2, 3, 4, 5, 6, 7, 8, 0, 1, 2, 3, 4, }; -const CPU86_LDouble f15rk[7] = +static const CPU86_LDouble f15rk[7] = { 0.00000000000000000000L, 1.00000000000000000000L, @@ -995,6 +996,7 @@ static void do_interrupt64(int intno, int is_int, int error_code, } #endif +#ifdef TARGET_X86_64 #if defined(CONFIG_USER_ONLY) void helper_syscall(int next_eip_addend) { @@ -1011,7 +1013,6 @@ void helper_syscall(int next_eip_addend) raise_exception_err(EXCP06_ILLOP, 0); } selector = (env->star >> 32) & 0xffff; -#ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { int code64; @@ -1037,9 +1038,7 @@ void helper_syscall(int next_eip_addend) env->eip = env->lstar; else env->eip = env->cstar; - } else -#endif - { + } else { ECX = (uint32_t)(env->eip + next_eip_addend); cpu_x86_set_cpl(env, 0); @@ -1058,7 +1057,9 @@ void helper_syscall(int next_eip_addend) } } #endif +#endif +#ifdef TARGET_X86_64 void helper_sysret(int dflag) { int cpl, selector; @@ -1071,7 +1072,6 @@ void helper_sysret(int dflag) raise_exception_err(EXCP0D_GPF, 0); } selector = (env->star >> 48) & 0xffff; -#ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { if (dflag == 2) { cpu_x86_load_seg_cache(env, R_CS, (selector + 16) | 3, @@ -1097,9 +1097,7 @@ void helper_sysret(int dflag) load_eflags((uint32_t)(env->regs[11]), TF_MASK | AC_MASK | ID_MASK | IF_MASK | IOPL_MASK | VM_MASK | RF_MASK | NT_MASK); cpu_x86_set_cpl(env, 3); - } else -#endif - { + } else { cpu_x86_load_seg_cache(env, R_CS, selector | 3, 0, 0xffffffff, DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | @@ -1123,6 +1121,7 @@ void helper_sysret(int dflag) } #endif } +#endif /* real mode interrupt */ static void do_interrupt_real(int intno, int is_int, int error_code, @@ -1285,8 +1284,8 @@ static int check_exception(int intno, int *error_code) * EIP value AFTER the interrupt instruction. It is only relevant if * is_int is TRUE. */ -void raise_interrupt(int intno, int is_int, int error_code, - int next_eip_addend) +static void raise_interrupt(int intno, int is_int, int error_code, + int next_eip_addend) { if (!is_int) { helper_svm_check_intercept_param(SVM_EXIT_EXCP_BASE + intno, error_code); @@ -1304,7 +1303,7 @@ void raise_interrupt(int intno, int is_int, int error_code, /* shortcuts to generate exceptions */ -void (raise_exception_err)(int exception_index, int error_code) +void raise_exception_err(int exception_index, int error_code) { raise_interrupt(exception_index, 0, error_code, 0); } @@ -3319,7 +3318,7 @@ static inline CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b) return a / b; } -void fpu_raise_exception(void) +static void fpu_raise_exception(void) { if (env->cr[0] & CR0_NE_MASK) { raise_exception(EXCP10_COPR); @@ -4660,6 +4659,7 @@ static float approx_rcp(float a) #endif +#if !defined(CONFIG_USER_ONLY) /* try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ @@ -4692,7 +4692,7 @@ void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) } env = saved_env; } - +#endif /* Secure Virtual Machine helpers */ |