diff options
-rw-r--r-- | include/exec/exec-all.h | 2 | ||||
-rw-r--r-- | target-alpha/translate.c | 5 | ||||
-rw-r--r-- | target-arm/translate.c | 9 | ||||
-rw-r--r-- | target-cris/translate.c | 5 | ||||
-rw-r--r-- | target-i386/translate.c | 26 | ||||
-rw-r--r-- | target-lm32/translate.c | 5 | ||||
-rw-r--r-- | target-m68k/translate.c | 5 | ||||
-rw-r--r-- | target-microblaze/translate.c | 5 | ||||
-rw-r--r-- | target-mips/translate.c | 9 | ||||
-rw-r--r-- | target-moxie/translate.c | 5 | ||||
-rw-r--r-- | target-openrisc/translate.c | 4 | ||||
-rw-r--r-- | target-ppc/translate.c | 5 | ||||
-rw-r--r-- | target-s390x/translate.c | 8 | ||||
-rw-r--r-- | target-sh4/translate.c | 7 | ||||
-rw-r--r-- | target-sparc/translate.c | 10 | ||||
-rw-r--r-- | target-tilegx/translate.c | 5 | ||||
-rw-r--r-- | target-tricore/translate.c | 5 | ||||
-rw-r--r-- | target-unicore32/translate.c | 5 | ||||
-rw-r--r-- | target-xtensa/translate.c | 5 | ||||
-rw-r--r-- | tcg/tcg.c | 11 | ||||
-rw-r--r-- | tcg/tcg.h | 2 | ||||
-rw-r--r-- | translate-all.c | 2 |
22 files changed, 79 insertions, 66 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5340745b0a..6a698026b5 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -75,7 +75,7 @@ typedef struct TranslationBlock TranslationBlock; void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb); void gen_intermediate_code_pc(CPUArchState *env, struct TranslationBlock *tb); void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb, - int pc_pos); + target_ulong *data); void cpu_gen_init(void); bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc); diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 538e20293a..8395a30a15 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -3023,7 +3023,8 @@ void gen_intermediate_code_pc (CPUAlphaState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(alpha_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUAlphaState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUAlphaState *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } diff --git a/target-arm/translate.c b/target-arm/translate.c index fedb7814bd..22969539fd 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11612,13 +11612,14 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, } } -void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUARMState *env, TranslationBlock *tb, + target_ulong *data) { if (is_a64(env)) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; env->condexec_bits = 0; } else { - env->regs[15] = tcg_ctx.gen_opc_pc[pc_pos]; - env->condexec_bits = gen_opc_condexec_bits[pc_pos]; + env->regs[15] = data[0]; + env->condexec_bits = data[1]; } } diff --git a/target-cris/translate.c b/target-cris/translate.c index d038bdbd19..77e2794c03 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3433,7 +3433,8 @@ void cris_initialize_tcg(void) } } -void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } diff --git a/target-i386/translate.c b/target-i386/translate.c index d3282e89a6..2f7b77fd7c 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -8055,26 +8055,12 @@ void gen_intermediate_code_pc(CPUX86State *env, TranslationBlock *tb) gen_intermediate_code_internal(x86_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb, + target_ulong *data) { - int cc_op; -#ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_OP)) { - int i; - qemu_log("RESTORE:\n"); - for(i = 0;i <= pc_pos; i++) { - if (tcg_ctx.gen_opc_instr_start[i]) { - qemu_log("0x%04x: " TARGET_FMT_lx "\n", i, - tcg_ctx.gen_opc_pc[i]); - } - } - qemu_log("pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", - pc_pos, tcg_ctx.gen_opc_pc[pc_pos] - tb->cs_base, - (uint32_t)tb->cs_base); - } -#endif - env->eip = tcg_ctx.gen_opc_pc[pc_pos] - tb->cs_base; - cc_op = gen_opc_cc_op[pc_pos]; - if (cc_op != CC_OP_DYNAMIC) + int cc_op = data[1]; + env->eip = data[0] - tb->cs_base; + if (cc_op != CC_OP_DYNAMIC) { env->cc_op = cc_op; + } } diff --git a/target-lm32/translate.c b/target-lm32/translate.c index e16c31a29c..3379d2c5fb 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -1207,9 +1207,10 @@ void lm32_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, cpu_fprintf(f, "\n\n"); } -void restore_state_to_opc(CPULM32State *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPULM32State *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } void lm32_translate_init(void) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 185c5650d9..ce8150e8e7 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -3118,7 +3118,8 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, cpu_fprintf (f, "FPRESULT = %12g\n", *(double *)&env->fp_result); } -void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 58b27ca652..973c74461f 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1928,7 +1928,8 @@ void mb_tcg_init(void) } } -void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, + target_ulong *data) { - env->sregs[SR_PC] = tcg_ctx.gen_opc_pc[pc_pos]; + env->sregs[SR_PC] = data[0]; } diff --git a/target-mips/translate.c b/target-mips/translate.c index c0a06741de..56f00e6e88 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -20061,18 +20061,19 @@ void cpu_state_reset(CPUMIPSState *env) } } -void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb, + target_ulong *data) { - env->active_tc.PC = tcg_ctx.gen_opc_pc[pc_pos]; + env->active_tc.PC = data[0]; env->hflags &= ~MIPS_HFLAG_BMASK; - env->hflags |= gen_opc_hflags[pc_pos]; + env->hflags |= data[1]; switch (env->hflags & MIPS_HFLAG_BMASK_BASE) { case MIPS_HFLAG_BR: break; case MIPS_HFLAG_BC: case MIPS_HFLAG_BL: case MIPS_HFLAG_B: - env->btarget = gen_opc_btarget[pc_pos]; + env->btarget = data[2]; break; } } diff --git a/target-moxie/translate.c b/target-moxie/translate.c index 68588da236..c007764f3e 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -922,7 +922,8 @@ void gen_intermediate_code_pc(CPUMoxieState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(moxie_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUMoxieState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUMoxieState *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 7573d346d4..26bf87f5fd 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -1794,7 +1794,7 @@ void openrisc_cpu_dump_state(CPUState *cs, FILE *f, } void restore_state_to_opc(CPUOpenRISCState *env, TranslationBlock *tb, - int pc_pos) + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 2dc6fb463a..5c2dc38d35 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -11629,7 +11629,8 @@ void gen_intermediate_code_pc (CPUPPCState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(ppc_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUPPCState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUPPCState *env, TranslationBlock *tb, + target_ulong *data) { - env->nip = tcg_ctx.gen_opc_pc[pc_pos]; + env->nip = data[0]; } diff --git a/target-s390x/translate.c b/target-s390x/translate.c index b1aa139f88..104265db5f 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -5460,11 +5460,11 @@ void gen_intermediate_code_pc (CPUS390XState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(s390_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, + target_ulong *data) { - int cc_op; - env->psw.addr = tcg_ctx.gen_opc_pc[pc_pos]; - cc_op = gen_opc_cc_op[pc_pos]; + int cc_op = data[1]; + env->psw.addr = data[0]; if ((cc_op != CC_OP_DYNAMIC) && (cc_op != CC_OP_STATIC)) { env->cc_op = cc_op; } diff --git a/target-sh4/translate.c b/target-sh4/translate.c index b48b9bbb5e..d3fe1de94a 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1950,8 +1950,9 @@ void gen_intermediate_code_pc(CPUSH4State * env, struct TranslationBlock *tb) gen_intermediate_code_internal(sh_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUSH4State *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUSH4State *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; - env->flags = gen_opc_hflags[pc_pos]; + env->pc = data[0]; + env->flags = data[1]; } diff --git a/target-sparc/translate.c b/target-sparc/translate.c index e6ecd2182f..18344c82ed 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5459,11 +5459,13 @@ void gen_intermediate_code_init(CPUSPARCState *env) } } -void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb, + target_ulong *data) { - target_ulong pc, npc; - env->pc = pc = tcg_ctx.gen_opc_pc[pc_pos]; - npc = gen_opc_npc[pc_pos]; + target_ulong pc = data[0]; + target_ulong npc = data[1]; + + env->pc = pc; if (npc == DYNAMIC_PC) { /* dynamic NPC: already stored */ } else if (npc & JUMP_PC) { diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index a6b9cd87ac..eae5622a9a 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2144,9 +2144,10 @@ void gen_intermediate_code_pc(CPUTLGState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(tilegx_env_get_cpu(env), tb, true); } -void restore_state_to_opc(CPUTLGState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUTLGState *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } void tilegx_tcg_init(void) diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 5345486dd9..6f5438fe1e 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -8350,9 +8350,10 @@ gen_intermediate_code_pc(CPUTriCoreState *env, struct TranslationBlock *tb) } void -restore_state_to_opc(CPUTriCoreState *env, TranslationBlock *tb, int pc_pos) +restore_state_to_opc(CPUTriCoreState *env, TranslationBlock *tb, + target_ulong *data) { - env->PC = tcg_ctx.gen_opc_pc[pc_pos]; + env->PC = data[0]; } /* * diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index 5e61e384fa..9d8167a35c 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -2129,7 +2129,8 @@ void uc32_cpu_dump_state(CPUState *cs, FILE *f, cpu_dump_state_ucf64(env, f, cpu_fprintf, flags); } -void restore_state_to_opc(CPUUniCore32State *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUUniCore32State *env, TranslationBlock *tb, + target_ulong *data) { - env->regs[31] = tcg_ctx.gen_opc_pc[pc_pos]; + env->regs[31] = data[0]; } diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 4d4dc06af2..ac967e136c 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -3202,7 +3202,8 @@ void xtensa_cpu_dump_state(CPUState *cs, FILE *f, } } -void restore_state_to_opc(CPUXtensaState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUXtensaState *env, TranslationBlock *tb, + target_ulong *data) { - env->pc = tcg_ctx.gen_opc_pc[pc_pos]; + env->pc = data[0]; } @@ -2294,7 +2294,7 @@ static inline int tcg_gen_code_common(TCGContext *s, tcg_insn_unit *gen_code_buf, long search_pc) { - int oi, oi_next; + int i, oi, oi_next; #ifdef DEBUG_DISAS if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { @@ -2361,6 +2361,15 @@ static inline int tcg_gen_code_common(TCGContext *s, tcg_reg_alloc_movi(s, args, dead_args, sync_args); break; case INDEX_op_insn_start: + for (i = 0; i < TARGET_INSN_START_WORDS; ++i) { + target_ulong a; +#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS + a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2]; +#else + a = args[i]; +#endif + s->gen_opc_data[i] = a; + } break; case INDEX_op_discard: temp_dead(s, args[0]); @@ -580,6 +580,8 @@ struct TCGContext { target_ulong gen_opc_pc[OPC_BUF_SIZE]; uint16_t gen_opc_icount[OPC_BUF_SIZE]; uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; + + target_ulong gen_opc_data[TARGET_INSN_START_WORDS]; }; extern TCGContext tcg_ctx; diff --git a/translate-all.c b/translate-all.c index 19c2988e84..9f801ae758 100644 --- a/translate-all.c +++ b/translate-all.c @@ -218,7 +218,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb, } cpu->icount_decr.u16.low -= s->gen_opc_icount[j]; - restore_state_to_opc(env, tb, j); + restore_state_to_opc(env, tb, s->gen_opc_data); #ifdef CONFIG_PROFILER s->restore_time += profile_getclock() - ti; |