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-rw-r--r--include/qemu/bswap.h60
-rw-r--r--include/qemu/cpu-float.h64
-rw-r--r--migration/vmstate-types.c1
-rw-r--r--target/alpha/cpu.h1
-rw-r--r--target/arm/cpu.h1
-rw-r--r--target/hppa/cpu.h1
-rw-r--r--target/i386/cpu.h1
-rw-r--r--target/m68k/cpu.h1
-rw-r--r--target/microblaze/cpu.h2
-rw-r--r--target/openrisc/cpu.h1
-rw-r--r--target/ppc/cpu.h1
-rw-r--r--target/riscv/cpu.h2
-rw-r--r--target/rx/cpu.h1
-rw-r--r--target/s390x/cpu.h1
-rw-r--r--target/sh4/cpu.h1
-rw-r--r--target/sparc/cpu.h1
-rw-r--r--target/tricore/cpu.h1
-rw-r--r--target/xtensa/cpu.h1
18 files changed, 80 insertions, 62 deletions
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 9dff7c7dbb..346d05f2aa 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -19,8 +19,6 @@
extern "C" {
#endif
-#include "fpu/softfloat-types.h"
-
#ifdef BSWAP_FROM_BYTESWAP
static inline uint16_t bswap16(uint16_t x)
{
@@ -202,64 +200,6 @@ CPU_CONVERT(le, 64, uint64_t)
# define const_le16(_x) (_x)
#endif
-/* Unions for reinterpreting between floats and integers. */
-
-typedef union {
- float32 f;
- uint32_t l;
-} CPU_FloatU;
-
-typedef union {
- float64 d;
-#if HOST_BIG_ENDIAN
- struct {
- uint32_t upper;
- uint32_t lower;
- } l;
-#else
- struct {
- uint32_t lower;
- uint32_t upper;
- } l;
-#endif
- uint64_t ll;
-} CPU_DoubleU;
-
-typedef union {
- floatx80 d;
- struct {
- uint64_t lower;
- uint16_t upper;
- } l;
-} CPU_LDoubleU;
-
-typedef union {
- float128 q;
-#if HOST_BIG_ENDIAN
- struct {
- uint32_t upmost;
- uint32_t upper;
- uint32_t lower;
- uint32_t lowest;
- } l;
- struct {
- uint64_t upper;
- uint64_t lower;
- } ll;
-#else
- struct {
- uint32_t lowest;
- uint32_t lower;
- uint32_t upper;
- uint32_t upmost;
- } l;
- struct {
- uint64_t lower;
- uint64_t upper;
- } ll;
-#endif
-} CPU_QuadU;
-
/* unaligned/endian-independent pointer access */
/*
diff --git a/include/qemu/cpu-float.h b/include/qemu/cpu-float.h
new file mode 100644
index 0000000000..911099499f
--- /dev/null
+++ b/include/qemu/cpu-float.h
@@ -0,0 +1,64 @@
+#ifndef QEMU_CPU_FLOAT_H_
+#define QEMU_CPU_FLOAT_H_
+
+#include "fpu/softfloat-types.h"
+
+/* Unions for reinterpreting between floats and integers. */
+
+typedef union {
+ float32 f;
+ uint32_t l;
+} CPU_FloatU;
+
+typedef union {
+ float64 d;
+#if HOST_BIG_ENDIAN
+ struct {
+ uint32_t upper;
+ uint32_t lower;
+ } l;
+#else
+ struct {
+ uint32_t lower;
+ uint32_t upper;
+ } l;
+#endif
+ uint64_t ll;
+} CPU_DoubleU;
+
+typedef union {
+ floatx80 d;
+ struct {
+ uint64_t lower;
+ uint16_t upper;
+ } l;
+} CPU_LDoubleU;
+
+typedef union {
+ float128 q;
+#if HOST_BIG_ENDIAN
+ struct {
+ uint32_t upmost;
+ uint32_t upper;
+ uint32_t lower;
+ uint32_t lowest;
+ } l;
+ struct {
+ uint64_t upper;
+ uint64_t lower;
+ } ll;
+#else
+ struct {
+ uint32_t lowest;
+ uint32_t lower;
+ uint32_t upper;
+ uint32_t upmost;
+ } l;
+ struct {
+ uint64_t lower;
+ uint64_t upper;
+ } ll;
+#endif
+} CPU_QuadU;
+
+#endif /* QEMU_CPU_FLOAT_H_ */
diff --git a/migration/vmstate-types.c b/migration/vmstate-types.c
index bf4d440308..e83bfccb9e 100644
--- a/migration/vmstate-types.c
+++ b/migration/vmstate-types.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/cpu-float.h"
#include "qemu-file.h"
#include "migration.h"
#include "migration/vmstate.h"
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 58f00b7814..994a018b91 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* Alpha processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ccf635ac5c..cb5359a747 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -21,6 +21,7 @@
#define ARM_CPU_H
#include "kvm-consts.h"
+#include "qemu/cpu-float.h"
#include "hw/registerfields.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 4cc936b6bf..c43b93a68f 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* PA-RISC 1.x processors have a strong memory model. */
/* ??? While we do not yet implement PA-RISC 2.0, those processors have
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ccf627d2c5..8422f6c18e 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -25,6 +25,7 @@
#include "kvm/hyperv-proto.h"
#include "exec/cpu-defs.h"
#include "qapi/qapi-types-common.h"
+#include "qemu/cpu-float.h"
/* The x86 has a strong memory model with some store-after-load re-ordering */
#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 872e8ce637..9b3bf7a448 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -22,6 +22,7 @@
#define M68K_CPU_H
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#include "cpu-qom.h"
#define OS_BYTE 0
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 0a0ce71b6a..67aa88b8db 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -22,7 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#include "fpu/softfloat-types.h"
+#include "qemu/cpu-float.h"
typedef struct CPUArchState CPUMBState;
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index bdf29d2dc4..b9584f10d4 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -21,6 +21,7 @@
#define OPENRISC_CPU_H
#include "exec/cpu-defs.h"
+#include "fpu/softfloat-types.h"
#include "hw/core/cpu.h"
#include "qom/object.h"
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 627e574127..473436a49e 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -21,6 +21,7 @@
#define PPC_CPU_H
#include "qemu/int128.h"
+#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
#include "cpu-qom.h"
#include "qom/object.h"
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index c069fe85fa..e1d976bdef 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -23,7 +23,7 @@
#include "hw/core/cpu.h"
#include "hw/registerfields.h"
#include "exec/cpu-defs.h"
-#include "fpu/softfloat-types.h"
+#include "qemu/cpu-float.h"
#include "qom/object.h"
#include "qemu/int128.h"
#include "cpu_bits.h"
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index b4abd90ccd..1c267f83bf 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -24,6 +24,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* PSW define */
REG32(PSW, 0)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index c49c8466e7..7d6d01325b 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -28,6 +28,7 @@
#include "cpu-qom.h"
#include "cpu_models.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#define ELF_MACHINE_UNAME "S390X"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index c72a30edfd..14d490ac47 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
/* CPU Subtypes */
#define SH_CPU_SH7750 (1 << 0)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index abb38db674..dd9e2f5cdb 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -4,6 +4,7 @@
#include "qemu/bswap.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#if !defined(TARGET_SPARC64)
#define TARGET_DPREGS 16
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index 108d6b8288..3b9c533a7c 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "qemu/cpu-float.h"
#include "tricore-defs.h"
struct tricore_boot_info;
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index f10cfabdc3..71142ea8f4 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -29,6 +29,7 @@
#define XTENSA_CPU_H
#include "cpu-qom.h"
+#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
#include "xtensa-isa.h"
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-30 01:40:32 +0000