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-rw-r--r--target/mips/meson.build1
-rw-r--r--target/mips/msa32.decode5
-rw-r--r--target/mips/msa64.decode17
-rw-r--r--target/mips/msa_translate.c14
4 files changed, 37 insertions, 0 deletions
diff --git a/target/mips/meson.build b/target/mips/meson.build
index 3810554343..b63d8f150f 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -1,5 +1,6 @@
gen = [
decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'),
+ decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'),
]
mips_ss = ss.source_set()
diff --git a/target/mips/msa32.decode b/target/mips/msa32.decode
index d69675132b..ca200e373b 100644
--- a/target/mips/msa32.decode
+++ b/target/mips/msa32.decode
@@ -10,11 +10,16 @@
# (Document Number: MD00866-2B-MSA32-AFP-01.12)
#
+&rtype rs rt rd sa
+
&msa_bz df wt s16
+@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
@bz ...... ... .. wt:5 s16:16 &msa_bz df=3
@bz_df ...... ... df:2 wt:5 s16:16 &msa_bz
+LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
+
BZ_V 010001 01011 ..... ................ @bz
BNZ_V 010001 01111 ..... ................ @bz
diff --git a/target/mips/msa64.decode b/target/mips/msa64.decode
new file mode 100644
index 0000000000..d2442474d0
--- /dev/null
+++ b/target/mips/msa64.decode
@@ -0,0 +1,17 @@
+# MIPS SIMD Architecture Module instruction set
+#
+# Copyright (C) 2020 Philippe Mathieu-Daudé
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+#
+# Reference:
+# MIPS Architecture for Programmers Volume IV-j
+# The MIPS64 SIMD Architecture Module, Revision 1.12
+# (Document Number: MD00868-1D-MSA64-AFP-01.12)
+#
+
+&rtype rs rt rd sa !extern
+
+@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
+
+DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
diff --git a/target/mips/msa_translate.c b/target/mips/msa_translate.c
index 8a48f889aa..ae6587edf6 100644
--- a/target/mips/msa_translate.c
+++ b/target/mips/msa_translate.c
@@ -19,6 +19,7 @@
/* Include the auto-generated decoder. */
#include "decode-msa32.c.inc"
+#include "decode-msa64.c.inc"
#define OPC_MSA (0x1E << 26)
@@ -2266,7 +2267,20 @@ static bool trans_MSA(DisasContext *ctx, arg_MSA *a)
return true;
}
+static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
+{
+ return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);
+}
+
+static bool trans_DLSA(DisasContext *ctx, arg_rtype *a)
+{
+ return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
+}
+
bool decode_ase_msa(DisasContext *ctx, uint32_t insn)
{
+ if (TARGET_LONG_BITS == 64 && decode_msa64(ctx, insn)) {
+ return true;
+ }
return decode_msa32(ctx, insn);
}