diff options
| -rw-r--r-- | gdbstub.c | 16 | ||||
| -rw-r--r-- | linux-user/signal.c | 4 | ||||
| -rw-r--r-- | monitor.c | 3 | ||||
| -rw-r--r-- | target-sparc/cpu.h | 102 | ||||
| -rw-r--r-- | target-sparc/helper.c | 10 | ||||
| -rw-r--r-- | target-sparc/machine.c | 4 | ||||
| -rw-r--r-- | target-sparc/op_helper.c | 272 |
7 files changed, 271 insertions, 140 deletions
@@ -804,7 +804,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ switch (n) { case 64: GET_REGA(env->y); - case 65: GET_REGA(GET_PSR(env)); + case 65: GET_REGA(cpu_get_psr(env)); case 66: GET_REGA(env->wim); case 67: GET_REGA(env->tbr); case 68: GET_REGA(env->pc); @@ -829,10 +829,10 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) switch (n) { case 80: GET_REGL(env->pc); case 81: GET_REGL(env->npc); - case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) | - ((env->asi & 0xff) << 24) | - ((env->pstate & 0xfff) << 8) | - GET_CWP64(env)); + case 82: GET_REGL((cpu_get_ccr(env) << 32) | + ((env->asi & 0xff) << 24) | + ((env->pstate & 0xfff) << 8) | + cpu_get_cwp64(env)); case 83: GET_REGL(env->fsr); case 84: GET_REGL(env->fprs); case 85: GET_REGL(env->y); @@ -868,7 +868,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ switch (n) { case 64: env->y = tmp; break; - case 65: PUT_PSR(env, tmp); break; + case 65: cpu_put_psr(env, tmp); break; case 66: env->wim = tmp; break; case 67: env->tbr = tmp; break; case 68: env->pc = tmp; break; @@ -892,10 +892,10 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) case 80: env->pc = tmp; break; case 81: env->npc = tmp; break; case 82: - PUT_CCR(env, tmp >> 32); + cpu_put_ccr(env, tmp >> 32); env->asi = (tmp >> 24) & 0xff; env->pstate = (tmp >> 8) & 0xfff; - PUT_CWP64(env, tmp & 0xff); + cpu_put_cwp64(env, tmp & 0xff); break; case 83: env->fsr = tmp; break; case 84: env->fprs = tmp; break; diff --git a/linux-user/signal.c b/linux-user/signal.c index a72c15ca08..e5a187e106 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -2111,8 +2111,8 @@ void sparc64_set_context(CPUSPARCState *env) err |= __get_user(env->y, &((*grp)[MC_Y])); err |= __get_user(tstate, &((*grp)[MC_TSTATE])); env->asi = (tstate >> 24) & 0xff; - PUT_CCR(env, tstate >> 32); - PUT_CWP64(env, tstate & 0x1f); + cpu_put_ccr(env, tstate >> 32); + cpu_put_cwp64(env, tstate & 0x1f); err |= __get_user(env->gregs[1], (&(*grp)[MC_G1])); err |= __get_user(env->gregs[2], (&(*grp)[MC_G2])); err |= __get_user(env->gregs[3], (&(*grp)[MC_G3])); @@ -2856,7 +2856,8 @@ static target_long monitor_get_tbl (const struct MonitorDef *md, int val) static target_long monitor_get_psr (const struct MonitorDef *md, int val) { CPUState *env = mon_get_cpu(); - return GET_PSR(env); + + return cpu_get_psr(env); } #endif diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index b67933381c..22f3ad05d7 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -434,6 +434,7 @@ typedef struct CPUSPARCState { sparc_def_t *def; } CPUSPARCState; +#ifndef NO_CPU_IO_DEFS /* helper.c */ CPUSPARCState *cpu_sparc_init(const char *cpu_model); void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); @@ -453,62 +454,18 @@ void gen_intermediate_code_init(CPUSPARCState *env); /* cpu-exec.c */ int cpu_sparc_exec(CPUSPARCState *s); -#if !defined (TARGET_SPARC64) -#define GET_PSR(env) (env->version | (env->psr & PSR_ICC) | \ - (env->psref? PSR_EF : 0) | \ - (env->psrpil << 8) | \ - (env->psrs? PSR_S : 0) | \ - (env->psrps? PSR_PS : 0) | \ - (env->psret? PSR_ET : 0) | env->cwp) -#else -#define GET_PSR(env) (env->version | (env->psr & PSR_ICC) | \ - (env->psref? PSR_EF : 0) | \ - (env->psrpil << 8) | \ - (env->psrs? PSR_S : 0) | \ - (env->psrps? PSR_PS : 0) | \ - env->cwp) -#endif - -#ifndef NO_CPU_IO_DEFS - -static inline int cpu_cwp_inc(CPUSPARCState *env1, int cwp) -{ - if (unlikely(cwp >= env1->nwindows)) - cwp -= env1->nwindows; - return cwp; -} - -static inline int cpu_cwp_dec(CPUSPARCState *env1, int cwp) -{ - if (unlikely(cwp < 0)) - cwp += env1->nwindows; - return cwp; -} +/* op_helper.c */ +target_ulong cpu_get_psr(CPUState *env1); +void cpu_put_psr(CPUState *env1, target_ulong val); +#ifdef TARGET_SPARC64 +target_ulong cpu_get_ccr(CPUState *env1); +void cpu_put_ccr(CPUState *env1, target_ulong val); +target_ulong cpu_get_cwp64(CPUState *env1); +void cpu_put_cwp64(CPUState *env1, int cwp); #endif - -static inline void memcpy32(target_ulong *dst, const target_ulong *src) -{ - dst[0] = src[0]; - dst[1] = src[1]; - dst[2] = src[2]; - dst[3] = src[3]; - dst[4] = src[4]; - dst[5] = src[5]; - dst[6] = src[6]; - dst[7] = src[7]; -} - -static inline void cpu_set_cwp(CPUSPARCState *env1, int new_cwp) -{ - /* put the modified wrap registers at their proper location */ - if (env1->cwp == env1->nwindows - 1) - memcpy32(env1->regbase, env1->regbase + env1->nwindows * 16); - env1->cwp = new_cwp; - /* put the wrap registers at their temporary location */ - if (new_cwp == env1->nwindows - 1) - memcpy32(env1->regbase + env1->nwindows * 16, env1->regbase); - env1->regwptr = env1->regbase + (new_cwp * 16); -} +int cpu_cwp_inc(CPUState *env1, int cwp); +int cpu_cwp_dec(CPUState *env1, int cwp); +void cpu_set_cwp(CPUState *env1, int new_cwp); /* sun4m.c, sun4u.c */ void cpu_check_irqs(CPUSPARCState *env); @@ -530,41 +487,6 @@ static inline int tlb_compare_context(const SparcTLBEntry *tlb, } #endif - -static inline void PUT_PSR(CPUSPARCState *env1, target_ulong val) -{ - env1->psr = val & PSR_ICC; - env1->psref = (val & PSR_EF)? 1 : 0; - env1->psrpil = (val & PSR_PIL) >> 8; -#if ((!defined (TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) - cpu_check_irqs(env1); -#endif - env1->psrs = (val & PSR_S)? 1 : 0; - env1->psrps = (val & PSR_PS)? 1 : 0; -#if !defined (TARGET_SPARC64) - env1->psret = (val & PSR_ET)? 1 : 0; -#endif - cpu_set_cwp(env1, val & PSR_CWP); - env1->cc_op = CC_OP_FLAGS; -} - -#ifdef TARGET_SPARC64 -#define GET_CCR(env) (((env->xcc >> 20) << 4) | ((env->psr & PSR_ICC) >> 20)) -#define PUT_CCR(env, val) do { int _tmp = val; \ - env->xcc = (_tmp >> 4) << 20; \ - env->psr = (_tmp & 0xf) << 20; \ - CC_OP = CC_OP_FLAGS; \ - } while (0) -#define GET_CWP64(env) (env->nwindows - 1 - (env)->cwp) - -#ifndef NO_CPU_IO_DEFS -static inline void PUT_CWP64(CPUSPARCState *env1, int cwp) -{ - if (unlikely(cwp >= env1->nwindows || cwp < 0)) - cwp %= env1->nwindows; - cpu_set_cwp(env1, env1->nwindows - 1 - cwp); -} -#endif #endif /* cpu-exec.c */ diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 0ba7c9ff13..46421225c4 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -1490,10 +1490,10 @@ void cpu_dump_state(CPUState *env, FILE *f, } #ifdef TARGET_SPARC64 cpu_fprintf(f, "pstate: %08x ccr: %02x (icc: ", env->pstate, - GET_CCR(env)); - cpu_print_cc(f, cpu_fprintf, GET_CCR(env) << PSR_CARRY_SHIFT); + cpu_get_ccr(env)); + cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << PSR_CARRY_SHIFT); cpu_fprintf(f, " xcc: "); - cpu_print_cc(f, cpu_fprintf, GET_CCR(env) << (PSR_CARRY_SHIFT - 4)); + cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << (PSR_CARRY_SHIFT - 4)); cpu_fprintf(f, ") asi: %02x tl: %d pil: %x\n", env->asi, env->tl, env->psrpil); cpu_fprintf(f, "cansave: %d canrestore: %d otherwin: %d wstate: %d " @@ -1503,8 +1503,8 @@ void cpu_dump_state(CPUState *env, FILE *f, cpu_fprintf(f, "fsr: " TARGET_FMT_lx " y: " TARGET_FMT_lx " fprs: " TARGET_FMT_lx "\n", env->fsr, env->y, env->fprs); #else - cpu_fprintf(f, "psr: %08x (icc: ", GET_PSR(env)); - cpu_print_cc(f, cpu_fprintf, GET_PSR(env)); + cpu_fprintf(f, "psr: %08x (icc: ", cpu_get_psr(env)); + cpu_print_cc(f, cpu_fprintf, cpu_get_psr(env)); cpu_fprintf(f, " SPE: %c%c%c) wim: %08x\n", env->psrs? 'S' : '-', env->psrps? 'P' : '-', env->psret? 'E' : '-', env->wim); diff --git a/target-sparc/machine.c b/target-sparc/machine.c index 4b87ec6d97..752e431778 100644 --- a/target-sparc/machine.c +++ b/target-sparc/machine.c @@ -33,7 +33,7 @@ void cpu_save(QEMUFile *f, void *opaque) qemu_put_betls(f, &env->pc); qemu_put_betls(f, &env->npc); qemu_put_betls(f, &env->y); - tmp = GET_PSR(env); + tmp = cpu_get_psr(env); qemu_put_be32(f, tmp); qemu_put_betls(f, &env->fsr); qemu_put_betls(f, &env->tbr); @@ -130,7 +130,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) tmp = qemu_get_be32(f); env->cwp = 0; /* needed to ensure that the wrapping registers are correctly updated */ - PUT_PSR(env, tmp); + cpu_put_psr(env, tmp); qemu_get_betls(f, &env->fsr); qemu_get_betls(f, &env->tbr); tmp = qemu_get_be32(f); diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index b6b08d3ae0..fcfd3f3161 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -253,11 +253,6 @@ void HELPER(raise_exception)(int tt) raise_exception(tt); } -static inline void set_cwp(int new_cwp) -{ - cpu_set_cwp(env, new_cwp); -} - void helper_check_align(target_ulong addr, uint32_t align) { if (addr & align) { @@ -1295,6 +1290,142 @@ uint32_t helper_compute_C_icc(void) return ret; } +static inline void memcpy32(target_ulong *dst, const target_ulong *src) +{ + dst[0] = src[0]; + dst[1] = src[1]; + dst[2] = src[2]; + dst[3] = src[3]; + dst[4] = src[4]; + dst[5] = src[5]; + dst[6] = src[6]; + dst[7] = src[7]; +} + +static void set_cwp(int new_cwp) +{ + /* put the modified wrap registers at their proper location */ + if (env->cwp == env->nwindows - 1) { + memcpy32(env->regbase, env->regbase + env->nwindows * 16); + } + env->cwp = new_cwp; + + /* put the wrap registers at their temporary location */ + if (new_cwp == env->nwindows - 1) { + memcpy32(env->regbase + env->nwindows * 16, env->regbase); + } + env->regwptr = env->regbase + (new_cwp * 16); +} + +void cpu_set_cwp(CPUState *env1, int new_cwp) +{ + CPUState *saved_env; + + saved_env = env; + env = env1; + set_cwp(new_cwp); + env = saved_env; +} + +static target_ulong get_psr(void) +{ + helper_compute_psr(); + +#if !defined (TARGET_SPARC64) + return env->version | (env->psr & PSR_ICC) | + (env->psref? PSR_EF : 0) | + (env->psrpil << 8) | + (env->psrs? PSR_S : 0) | + (env->psrps? PSR_PS : 0) | + (env->psret? PSR_ET : 0) | env->cwp; +#else + return env->version | (env->psr & PSR_ICC) | + (env->psref? PSR_EF : 0) | + (env->psrpil << 8) | + (env->psrs? PSR_S : 0) | + (env->psrps? PSR_PS : 0) | env->cwp; +#endif +} + +target_ulong cpu_get_psr(CPUState *env1) +{ + CPUState *saved_env; + target_ulong ret; + + saved_env = env; + env = env1; + ret = get_psr(); + env = saved_env; + return ret; +} + +static void put_psr(target_ulong val) +{ + env->psr = val & PSR_ICC; + env->psref = (val & PSR_EF)? 1 : 0; + env->psrpil = (val & PSR_PIL) >> 8; +#if ((!defined (TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) + cpu_check_irqs(env); +#endif + env->psrs = (val & PSR_S)? 1 : 0; + env->psrps = (val & PSR_PS)? 1 : 0; +#if !defined (TARGET_SPARC64) + env->psret = (val & PSR_ET)? 1 : 0; +#endif + set_cwp(val & PSR_CWP); + env->cc_op = CC_OP_FLAGS; +} + +void cpu_put_psr(CPUState *env1, target_ulong val) +{ + CPUState *saved_env; + + saved_env = env; + env = env1; + put_psr(val); + env = saved_env; +} + +static int cwp_inc(int cwp) +{ + if (unlikely(cwp >= env->nwindows)) { + cwp -= env->nwindows; + } + return cwp; +} + +int cpu_cwp_inc(CPUState *env1, int cwp) +{ + CPUState *saved_env; + target_ulong ret; + + saved_env = env; + env = env1; + ret = cwp_inc(cwp); + env = saved_env; + return ret; +} + +static int cwp_dec(int cwp) +{ + if (unlikely(cwp < 0)) { + cwp += env->nwindows; + } + return cwp; +} + +int cpu_cwp_dec(CPUState *env1, int cwp) +{ + CPUState *saved_env; + target_ulong ret; + + saved_env = env; + env = env1; + ret = cwp_dec(cwp); + env = saved_env; + return ret; +} + #ifdef TARGET_SPARC64 GEN_FCMPS(fcmps_fcc1, float32, 22, 0); GEN_FCMP(fcmpd_fcc1, float64, DT0, DT1, 22, 0); @@ -3016,7 +3147,7 @@ void helper_rett(void) raise_exception(TT_ILL_INSN); env->psret = 1; - cwp = cpu_cwp_inc(env, env->cwp + 1) ; + cwp = cwp_inc(env->cwp + 1) ; if (env->wim & (1 << cwp)) { raise_exception(TT_WIN_UNF); } @@ -3236,7 +3367,7 @@ void helper_save(void) { uint32_t cwp; - cwp = cpu_cwp_dec(env, env->cwp - 1); + cwp = cwp_dec(env->cwp - 1); if (env->wim & (1 << cwp)) { raise_exception(TT_WIN_OVF); } @@ -3247,7 +3378,7 @@ void helper_restore(void) { uint32_t cwp; - cwp = cpu_cwp_inc(env, env->cwp + 1); + cwp = cwp_inc(env->cwp + 1); if (env->wim & (1 << cwp)) { raise_exception(TT_WIN_UNF); } @@ -3256,15 +3387,16 @@ void helper_restore(void) void helper_wrpsr(target_ulong new_psr) { - if ((new_psr & PSR_CWP) >= env->nwindows) + if ((new_psr & PSR_CWP) >= env->nwindows) { raise_exception(TT_ILL_INSN); - else - PUT_PSR(env, new_psr); + } else { + cpu_put_psr(env, new_psr); + } } target_ulong helper_rdpsr(void) { - return GET_PSR(env); + return get_psr(); } #else @@ -3274,7 +3406,7 @@ void helper_save(void) { uint32_t cwp; - cwp = cpu_cwp_dec(env, env->cwp - 1); + cwp = cwp_dec(env->cwp - 1); if (env->cansave == 0) { raise_exception(TT_SPILL | (env->otherwin != 0 ? (TT_WOTHER | ((env->wstate & 0x38) >> 1)): @@ -3295,7 +3427,7 @@ void helper_restore(void) { uint32_t cwp; - cwp = cpu_cwp_inc(env, env->cwp + 1); + cwp = cwp_inc(env->cwp + 1); if (env->canrestore == 0) { raise_exception(TT_FILL | (env->otherwin != 0 ? (TT_WOTHER | ((env->wstate & 0x38) >> 1)): @@ -3336,26 +3468,101 @@ void helper_restored(void) env->otherwin--; } +static target_ulong get_ccr(void) +{ + target_ulong psr; + + psr = get_psr(); + + return ((env->xcc >> 20) << 4) | ((psr & PSR_ICC) >> 20); +} + +target_ulong cpu_get_ccr(CPUState *env1) +{ + CPUState *saved_env; + target_ulong ret; + + saved_env = env; + env = env1; + ret = get_ccr(); + env = saved_env; + return ret; +} + +static void put_ccr(target_ulong val) +{ + target_ulong tmp = val; + + env->xcc = (tmp >> 4) << 20; + env->psr = (tmp & 0xf) << 20; + CC_OP = CC_OP_FLAGS; +} + +void cpu_put_ccr(CPUState *env1, target_ulong val) +{ + CPUState *saved_env; + + saved_env = env; + env = env1; + put_ccr(val); + env = saved_env; +} + +static target_ulong get_cwp64(void) +{ + return env->nwindows - 1 - env->cwp; +} + +target_ulong cpu_get_cwp64(CPUState *env1) +{ + CPUState *saved_env; + target_ulong ret; + + saved_env = env; + env = env1; + ret = get_cwp64(); + env = saved_env; + return ret; +} + +static void put_cwp64(int cwp) +{ + if (unlikely(cwp >= env->nwindows || cwp < 0)) { + cwp %= env->nwindows; + } + set_cwp(env->nwindows - 1 - cwp); +} + +void cpu_put_cwp64(CPUState *env1, int cwp) +{ + CPUState *saved_env; + + saved_env = env; + env = env1; + put_cwp64(cwp); + env = saved_env; +} + target_ulong helper_rdccr(void) { - return GET_CCR(env); + return get_ccr(); } void helper_wrccr(target_ulong new_ccr) { - PUT_CCR(env, new_ccr); + put_ccr(new_ccr); } // CWP handling is reversed in V9, but we still use the V8 register // order. target_ulong helper_rdcwp(void) { - return GET_CWP64(env); + return get_cwp64(); } void helper_wrcwp(target_ulong new_cwp) { - PUT_CWP64(env, new_cwp); + put_cwp64(new_cwp); } // This function uses non-native bit order @@ -3475,10 +3682,10 @@ void helper_done(void) env->pc = tsptr->tnpc; env->npc = tsptr->tnpc + 4; - PUT_CCR(env, tsptr->tstate >> 32); + put_ccr(tsptr->tstate >> 32); env->asi = (tsptr->tstate >> 24) & 0xff; change_pstate((tsptr->tstate >> 8) & 0xf3f); - PUT_CWP64(env, tsptr->tstate & 0xff); + put_cwp64(tsptr->tstate & 0xff); env->tl--; DPRINTF_PSTATE("... helper_done tl=%d\n", env->tl); @@ -3496,10 +3703,10 @@ void helper_retry(void) env->pc = tsptr->tpc; env->npc = tsptr->tnpc; - PUT_CCR(env, tsptr->tstate >> 32); + put_ccr(tsptr->tstate >> 32); env->asi = (tsptr->tstate >> 24) & 0xff; change_pstate((tsptr->tstate >> 8) & 0xf3f); - PUT_CWP64(env, tsptr->tstate & 0xff); + put_cwp64(tsptr->tstate & 0xff); env->tl--; DPRINTF_PSTATE("... helper_retry tl=%d\n", env->tl); @@ -3650,9 +3857,9 @@ void do_interrupt(CPUState *env) } tsptr = cpu_tsptr(env); - tsptr->tstate = ((uint64_t)GET_CCR(env) << 32) | + tsptr->tstate = (get_ccr() << 32) | ((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) | - GET_CWP64(env); + get_cwp64(); tsptr->tpc = env->pc; tsptr->tnpc = env->npc; tsptr->tt = intno; @@ -3673,12 +3880,13 @@ void do_interrupt(CPUState *env) break; } - if (intno == TT_CLRWIN) - cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - 1)); - else if ((intno & 0x1c0) == TT_SPILL) - cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2)); - else if ((intno & 0x1c0) == TT_FILL) - cpu_set_cwp(env, cpu_cwp_inc(env, env->cwp + 1)); + if (intno == TT_CLRWIN) { + set_cwp(cwp_dec(env->cwp - 1)); + } else if ((intno & 0x1c0) == TT_SPILL) { + set_cwp(cwp_dec(env->cwp - env->cansave - 2)); + } else if ((intno & 0x1c0) == TT_FILL) { + set_cwp(cwp_inc(env->cwp + 1)); + } env->tbr &= ~0x7fffULL; env->tbr |= ((env->tl > 1) ? 1 << 14 : 0) | (intno << 5); env->pc = env->tbr; @@ -3769,8 +3977,8 @@ void do_interrupt(CPUState *env) } #endif env->psret = 0; - cwp = cpu_cwp_dec(env, env->cwp - 1); - cpu_set_cwp(env, cwp); + cwp = cwp_dec(env->cwp - 1); + set_cwp(cwp); env->regwptr[9] = env->pc; env->regwptr[10] = env->npc; env->psrps = env->psrs; |