aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--hw/arm/aspeed_ast2600.c2
-rw-r--r--target/arm/cpu.c32
-rw-r--r--target/arm/cpu.h2
3 files changed, 36 insertions, 0 deletions
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 1bf1246148..a8b3a8065a 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -316,6 +316,8 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
&error_abort);
object_property_set_bool(OBJECT(&s->cpu[i]), "neon", false,
&error_abort);
+ object_property_set_bool(OBJECT(&s->cpu[i]), "vfp-d32", false,
+ &error_abort);
object_property_set_link(OBJECT(&s->cpu[i]), "memory",
OBJECT(s->memory), &error_abort);
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 4d5bb57f07..353fc48567 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1277,6 +1277,9 @@ static Property arm_cpu_cfgend_property =
static Property arm_cpu_has_vfp_property =
DEFINE_PROP_BOOL("vfp", ARMCPU, has_vfp, true);
+static Property arm_cpu_has_vfp_d32_property =
+ DEFINE_PROP_BOOL("vfp-d32", ARMCPU, has_vfp_d32, true);
+
static Property arm_cpu_has_neon_property =
DEFINE_PROP_BOOL("neon", ARMCPU, has_neon, true);
@@ -1408,6 +1411,22 @@ void arm_cpu_post_init(Object *obj)
}
}
+ if (cpu->has_vfp && cpu_isar_feature(aa32_simd_r32, cpu)) {
+ cpu->has_vfp_d32 = true;
+ if (!kvm_enabled()) {
+ /*
+ * The permitted values of the SIMDReg bits [3:0] on
+ * Armv8-A are either 0b0000 and 0b0010. On such CPUs,
+ * make sure that has_vfp_d32 can not be set to false.
+ */
+ if (!(arm_feature(&cpu->env, ARM_FEATURE_V8) &&
+ !arm_feature(&cpu->env, ARM_FEATURE_M))) {
+ qdev_property_add_static(DEVICE(obj),
+ &arm_cpu_has_vfp_d32_property);
+ }
+ }
+ }
+
if (arm_feature(&cpu->env, ARM_FEATURE_NEON)) {
cpu->has_neon = true;
if (!kvm_enabled()) {
@@ -1674,6 +1693,19 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
return;
}
+ if (cpu->has_vfp_d32 != cpu->has_neon) {
+ error_setg(errp, "ARM CPUs must have both VFP-D32 and Neon or neither");
+ return;
+ }
+
+ if (!cpu->has_vfp_d32) {
+ uint32_t u;
+
+ u = cpu->isar.mvfr0;
+ u = FIELD_DP32(u, MVFR0, SIMDREG, 1); /* 16 registers */
+ cpu->isar.mvfr0 = u;
+ }
+
if (!cpu->has_vfp) {
uint64_t t;
uint32_t u;
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 36c608f0e6..af0119addf 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -924,6 +924,8 @@ struct ArchCPU {
bool has_pmu;
/* CPU has VFP */
bool has_vfp;
+ /* CPU has 32 VFP registers */
+ bool has_vfp_d32;
/* CPU has Neon */
bool has_neon;
/* CPU has M-profile DSP extension */