diff options
| author | TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> | 2024-10-07 10:56:55 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-10-22 11:57:25 -0700 |
| commit | c283c0748a01ec05f24d5aa24409f42b459e8938 (patch) | |
| tree | 6acca7823c4cccd138be77df76af302cd0e17e5c /tcg | |
| parent | a31768c0192a6f1f62d07c4985a77814be34a915 (diff) | |
tcg/riscv: Implement vector neg ops
Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20241007025700.47259-8-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/riscv/tcg-target.c.inc | 7 | ||||
| -rw-r--r-- | tcg/riscv/tcg-target.h | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 1893c419c6..ce8d6d0293 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -276,6 +276,7 @@ typedef enum { OPC_VADD_VV = 0x57 | V_OPIVV, OPC_VADD_VI = 0x57 | V_OPIVI, OPC_VSUB_VV = 0x8000057 | V_OPIVV, + OPC_VRSUB_VI = 0xc000057 | V_OPIVI, OPC_VAND_VV = 0x24000057 | V_OPIVV, OPC_VAND_VI = 0x24000057 | V_OPIVI, OPC_VOR_VV = 0x28000057 | V_OPIVV, @@ -2367,6 +2368,10 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, set_vtype_len(s, type); tcg_out_opc_vi(s, OPC_VXOR_VI, a0, a1, -1); break; + case INDEX_op_neg_vec: + set_vtype_len_sew(s, type, vece); + tcg_out_opc_vi(s, OPC_VRSUB_VI, a0, a1, 0); + break; case INDEX_op_cmp_vec: tcg_out_cmpsel(s, type, vece, args[3], a0, a1, a2, c2, -1, true, 0, true); @@ -2397,6 +2402,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) case INDEX_op_or_vec: case INDEX_op_xor_vec: case INDEX_op_not_vec: + case INDEX_op_neg_vec: case INDEX_op_cmp_vec: case INDEX_op_cmpsel_vec: return 1; @@ -2550,6 +2556,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_dupm_vec: case INDEX_op_ld_vec: return C_O1_I1(v, r); + case INDEX_op_neg_vec: case INDEX_op_not_vec: return C_O1_I1(v, v); case INDEX_op_add_vec: diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 94034504b2..ae10381e02 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -152,7 +152,7 @@ typedef enum { #define TCG_TARGET_HAS_nor_vec 0 #define TCG_TARGET_HAS_eqv_vec 0 #define TCG_TARGET_HAS_not_vec 1 -#define TCG_TARGET_HAS_neg_vec 0 +#define TCG_TARGET_HAS_neg_vec 1 #define TCG_TARGET_HAS_abs_vec 0 #define TCG_TARGET_HAS_roti_vec 0 #define TCG_TARGET_HAS_rots_vec 0 |