diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2023-08-05 13:57:32 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2023-08-24 11:22:42 -0700 |
commit | a0fdd7c91c220ea9240643b155f9f5bdc4a2e2a1 (patch) | |
tree | f50e12705f62f714ededdf941b06336b4abec3aa /tcg | |
parent | 128c7d51942fed5bf09ad835ef2dd9b57946ada3 (diff) |
tcg/sparc64: Implement negsetcond_*
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/sparc64/tcg-target.c.inc | 40 | ||||
-rw-r--r-- | tcg/sparc64/tcg-target.h | 4 |
2 files changed, 32 insertions, 12 deletions
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index ffcb879211..f2a346a1bd 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -720,7 +720,7 @@ static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGReg ret, } static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret, - TCGReg c1, int32_t c2, int c2const) + TCGReg c1, int32_t c2, int c2const, bool neg) { /* For 32-bit comparisons, we can play games with ADDC/SUBC. */ switch (cond) { @@ -760,22 +760,34 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret, default: tcg_out_cmp(s, c1, c2, c2const); tcg_out_movi_s13(s, ret, 0); - tcg_out_movcc(s, cond, MOVCC_ICC, ret, 1, 1); + tcg_out_movcc(s, cond, MOVCC_ICC, ret, neg ? -1 : 1, 1); return; } tcg_out_cmp(s, c1, c2, c2const); if (cond == TCG_COND_LTU) { - tcg_out_arithi(s, ret, TCG_REG_G0, 0, ARITH_ADDC); + if (neg) { + /* 0 - 0 - C = -C = (C ? -1 : 0) */ + tcg_out_arithi(s, ret, TCG_REG_G0, 0, ARITH_SUBC); + } else { + /* 0 + 0 + C = C = (C ? 1 : 0) */ + tcg_out_arithi(s, ret, TCG_REG_G0, 0, ARITH_ADDC); + } } else { - tcg_out_arithi(s, ret, TCG_REG_G0, -1, ARITH_SUBC); + if (neg) { + /* 0 + -1 + C = C - 1 = (C ? 0 : -1) */ + tcg_out_arithi(s, ret, TCG_REG_G0, -1, ARITH_ADDC); + } else { + /* 0 - -1 - C = 1 - C = (C ? 0 : 1) */ + tcg_out_arithi(s, ret, TCG_REG_G0, -1, ARITH_SUBC); + } } } static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret, - TCGReg c1, int32_t c2, int c2const) + TCGReg c1, int32_t c2, int c2const, bool neg) { - if (use_vis3_instructions) { + if (use_vis3_instructions && !neg) { switch (cond) { case TCG_COND_NE: if (c2 != 0) { @@ -796,11 +808,11 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret, if the input does not overlap the output. */ if (c2 == 0 && !is_unsigned_cond(cond) && c1 != ret) { tcg_out_movi_s13(s, ret, 0); - tcg_out_movr(s, cond, ret, c1, 1, 1); + tcg_out_movr(s, cond, ret, c1, neg ? -1 : 1, 1); } else { tcg_out_cmp(s, c1, c2, c2const); tcg_out_movi_s13(s, ret, 0); - tcg_out_movcc(s, cond, MOVCC_XCC, ret, 1, 1); + tcg_out_movcc(s, cond, MOVCC_XCC, ret, neg ? -1 : 1, 1); } } @@ -1355,7 +1367,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_brcond_i32(s, a2, a0, a1, const_args[1], arg_label(args[3])); break; case INDEX_op_setcond_i32: - tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2); + tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2, false); + break; + case INDEX_op_negsetcond_i32: + tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2, true); break; case INDEX_op_movcond_i32: tcg_out_movcond_i32(s, args[5], a0, a1, a2, c2, args[3], const_args[3]); @@ -1437,7 +1452,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_brcond_i64(s, a2, a0, a1, const_args[1], arg_label(args[3])); break; case INDEX_op_setcond_i64: - tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2); + tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2, false); + break; + case INDEX_op_negsetcond_i64: + tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2, true); break; case INDEX_op_movcond_i64: tcg_out_movcond_i64(s, args[5], a0, a1, a2, c2, args[3], const_args[3]); @@ -1564,6 +1582,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_sar_i64: case INDEX_op_setcond_i32: case INDEX_op_setcond_i64: + case INDEX_op_negsetcond_i32: + case INDEX_op_negsetcond_i64: return C_O1_I2(r, rZ, rJ); case INDEX_op_brcond_i32: diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h index 79889db760..3d41c9659b 100644 --- a/tcg/sparc64/tcg-target.h +++ b/tcg/sparc64/tcg-target.h @@ -106,7 +106,7 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 -#define TCG_TARGET_HAS_negsetcond_i32 0 +#define TCG_TARGET_HAS_negsetcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 #define TCG_TARGET_HAS_mulu2_i32 1 @@ -143,7 +143,7 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 -#define TCG_TARGET_HAS_negsetcond_i64 0 +#define TCG_TARGET_HAS_negsetcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 #define TCG_TARGET_HAS_mulu2_i64 0 |