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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-03-05 14:43:19 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-03-05 14:43:19 +0000 |
| commit | 2acf5e1d0e0f15be1b0ad85cf05b3a6e6307680c (patch) | |
| tree | 4fb5f7d0984ea90091db7c464ca7b47d29635bd0 /tcg/optimize.c | |
| parent | d7e2fe4aac8b74bbfe82b2309536528b4dbe0d34 (diff) | |
| parent | cf320769476c3e2820be2a6280bfa1e15baf396f (diff) | |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20220304' into staging
Reorder do_constant_folding_cond test to satisfy valgrind.
Fix value of MAX_OPC_PARAM_IARGS.
Add opcodes for vector nand, nor, eqv.
Support vector nand, nor, eqv on PPC and S390X hosts.
Support AVX512VL, AVX512BW, AVX512DQ, and AVX512VBMI2.
# gpg: Signature made Fri 04 Mar 2022 18:59:08 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20220304: (21 commits)
tcg/i386: Implement bitsel for avx512
tcg/i386: Implement more logical operations for avx512
tcg/i386: Implement avx512 multiply
tcg/i386: Implement avx512 min/max/abs
tcg/i386: Expand scalar rotate with avx512 insns
tcg/i386: Remove rotls_vec from tcg_target_op_def
tcg/i386: Expand vector word rotate as avx512vbmi2 shift-double
tcg/i386: Support avx512vbmi2 vector shift-double instructions
tcg/i386: Implement avx512 variable rotate
tcg/i386: Implement avx512 immediate rotate
tcg/i386: Implement avx512 immediate sari shift
tcg/i386: Implement avx512 scalar shift
tcg/i386: Implement avx512 variable shifts
tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinv
tcg/i386: Add tcg_out_evex_opc
tcg/i386: Detect AVX512
tcg/s390x: Implement vector NAND, NOR, EQV
tcg/ppc: Implement vector NAND, NOR, EQV
tcg: Add opcodes for vector nand, nor, eqv
tcg: Set MAX_OPC_PARAM_IARGS to 7
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/optimize.c')
| -rw-r--r-- | tcg/optimize.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/tcg/optimize.c b/tcg/optimize.c index e573000951..ae081ab29c 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -359,13 +359,13 @@ static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y) CASE_OP_32_64_VEC(orc): return x | ~y; - CASE_OP_32_64(eqv): + CASE_OP_32_64_VEC(eqv): return ~(x ^ y); - CASE_OP_32_64(nand): + CASE_OP_32_64_VEC(nand): return ~(x & y); - CASE_OP_32_64(nor): + CASE_OP_32_64_VEC(nor): return ~(x | y); case INDEX_op_clz_i32: @@ -552,10 +552,10 @@ static bool do_constant_folding_cond_eq(TCGCond c) static int do_constant_folding_cond(TCGType type, TCGArg x, TCGArg y, TCGCond c) { - uint64_t xv = arg_info(x)->val; - uint64_t yv = arg_info(y)->val; - if (arg_is_const(x) && arg_is_const(y)) { + uint64_t xv = arg_info(x)->val; + uint64_t yv = arg_info(y)->val; + switch (type) { case TCG_TYPE_I32: return do_constant_folding_cond_32(xv, yv, c); @@ -567,7 +567,7 @@ static int do_constant_folding_cond(TCGType type, TCGArg x, } } else if (args_are_copies(x, y)) { return do_constant_folding_cond_eq(c); - } else if (arg_is_const(y) && yv == 0) { + } else if (arg_is_const(y) && arg_info(y)->val == 0) { switch (c) { case TCG_COND_LTU: return 0; @@ -2119,7 +2119,7 @@ void tcg_optimize(TCGContext *s) case INDEX_op_dup2_vec: done = fold_dup2(&ctx, op); break; - CASE_OP_32_64(eqv): + CASE_OP_32_64_VEC(eqv): done = fold_eqv(&ctx, op); break; CASE_OP_32_64(extract): @@ -2170,13 +2170,13 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(mulu2): done = fold_multiply2(&ctx, op); break; - CASE_OP_32_64(nand): + CASE_OP_32_64_VEC(nand): done = fold_nand(&ctx, op); break; CASE_OP_32_64(neg): done = fold_neg(&ctx, op); break; - CASE_OP_32_64(nor): + CASE_OP_32_64_VEC(nor): done = fold_nor(&ctx, op); break; CASE_OP_32_64_VEC(not): |