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authorRichard Henderson <richard.henderson@linaro.org>2023-04-05 18:07:05 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-04-23 08:23:59 +0100
commit9ecf5f61b8f468f17483f325f565802c645983a5 (patch)
tree1e7d5ebf403a130c229e5c13d903da018069aac9 /tcg/loongarch64/tcg-target.c.inc
parent52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571 (diff)
tcg: Split out tcg_out_ext32u
We will need a backend interface for performing 32-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/loongarch64/tcg-target.c.inc')
-rw-r--r--tcg/loongarch64/tcg-target.c.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 037474510c..d2511eda7a 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1246,7 +1246,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_brcond(s, a2, a0, a1, arg_label(args[3]));
break;
- case INDEX_op_ext32u_i64:
case INDEX_op_extu_i32_i64:
tcg_out_ext32u(s, a0, a1);
break;
@@ -1615,6 +1614,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext16u_i32:
case INDEX_op_ext16u_i64:
case INDEX_op_ext32s_i64:
+ case INDEX_op_ext32u_i64:
default:
g_assert_not_reached();
}