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authorStefan Markovic <smarkovic@wavecomp.com>2018-10-16 16:41:19 +0200
committerAleksandar Markovic <amarkovic@wavecomp.com>2018-10-18 20:37:20 +0200
commitd5ebcbaf09e8c14e62b2966446195be5eeabcbab (patch)
treef147767f701b40e0f6a33175dcbdb5dfb5070c78 /target
parentfdac60cd0458f34b2e79d74a55bec10836e26471 (diff)
target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH
Fix misplaced 'break' in handling of NM_SHRA_R_PH. Found by Coverity (CID 1395627). Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'target')
-rw-r--r--target/mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2890219f0b..12f2aecf7e 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -19970,8 +19970,8 @@ static void gen_pool32a5_nanomips_insn(DisasContext *ctx, int opc,
case 0:
/* SHRA_PH */
gen_helper_shra_ph(v1_t, t0, v1_t);
- break;
gen_store_gpr(v1_t, rt);
+ break;
case 1:
/* SHRA_R_PH */
gen_helper_shra_r_ph(v1_t, t0, v1_t);