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authorAlex Bennée <alex.bennee@linaro.org>2023-11-06 18:50:55 +0000
committerAlex Bennée <alex.bennee@linaro.org>2023-11-08 15:15:23 +0000
commitacd8e83a2f81a6ac98f0ddffd2b476d6c9d8a48a (patch)
tree35b7822c466608462c597a545570eef665e5d1cb /target
parentf654387b8138ccbc5d9e3eeb6fedd2b73fbfe4b4 (diff)
target/arm: hide aliased MIDR from gdbstub
This is just a constant alias register with the same value as the "other" MIDR so it serves no purpose being presented to gdbstub. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20231106185112.2755262-6-alex.bennee@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6acd87f5b9..ff1970981e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9000,7 +9000,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
.type = ARM_CP_CONST, .resetvalue = cpu->revidr },
};
ARMCPRegInfo id_v8_midr_alias_cp_reginfo = {
- .name = "MIDR", .type = ARM_CP_ALIAS | ARM_CP_CONST,
+ .name = "MIDR", .type = ARM_CP_ALIAS | ARM_CP_CONST | ARM_CP_NO_GDB,
.cp = 15, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 4,
.access = PL1_R, .resetvalue = cpu->midr
};