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authorMax Filippov <jcmvbkbc@gmail.com>2011-11-26 15:48:41 +0400
committerMax Filippov <jcmvbkbc@gmail.com>2017-01-16 19:19:03 -0800
commit3a3c9dc4ca2eaa612cbd5d4c85d674b15eadfb02 (patch)
treed64a088bd5188f6b19fe1fcd341283140f5fcc0e /target/xtensa/helper.h
parent8b912ff033cbc2e58476dfdc00fa2b8529c9eb96 (diff)
target-xtensa: implement RER/WER instructions
RER and WER are privileged instructions for accessing external registers. External register address space is local to processor core. There's no alignment requirements, addressable units are 32-bit wide registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa/helper.h')
-rw-r--r--target/xtensa/helper.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target/xtensa/helper.h b/target/xtensa/helper.h
index 7e1474147b..db3c9c5f21 100644
--- a/target/xtensa/helper.h
+++ b/target/xtensa/helper.h
@@ -58,3 +58,6 @@ DEF_HELPER_4(olt_s, void, env, i32, f32, f32)
DEF_HELPER_4(ult_s, void, env, i32, f32, f32)
DEF_HELPER_4(ole_s, void, env, i32, f32, f32)
DEF_HELPER_4(ule_s, void, env, i32, f32, f32)
+
+DEF_HELPER_2(rer, i32, env, i32)
+DEF_HELPER_3(wer, void, env, i32, i32)