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authorRichard Henderson <richard.henderson@linaro.org>2023-02-26 12:35:42 -1000
committerRichard Henderson <richard.henderson@linaro.org>2023-03-13 06:44:38 -0700
commit32f948afcf874f16faee2ab69ccca911d3b99322 (patch)
treeb76e99048ae46bec506b2aa01aafeec0c8ef70e0 /target/tricore
parent0a476786263fd3b68b89634561576aedac49e44a (diff)
target/tricore: Drop some temp initialization
The temp variables here are always set afterward; the initialization with a constant was discarded. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/tricore')
-rw-r--r--target/tricore/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 6b2065803f..4e3e648049 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -6914,7 +6914,7 @@ static void decode_rrr1_maddq_h(DisasContext *ctx)
r4 = MASK_OP_RRR1_D(ctx->opcode);
n = MASK_OP_RRR1_N(ctx->opcode);
- temp = tcg_const_i32(n);
+ temp = tcg_temp_new();
temp2 = tcg_temp_new();
switch (op2) {
@@ -7396,7 +7396,7 @@ static void decode_rrr1_msubq_h(DisasContext *ctx)
r4 = MASK_OP_RRR1_D(ctx->opcode);
n = MASK_OP_RRR1_N(ctx->opcode);
- temp = tcg_const_i32(n);
+ temp = tcg_temp_new();
temp2 = tcg_temp_new();
switch (op2) {