diff options
author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2019-06-17 16:05:10 +0200 |
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committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2019-08-22 12:10:47 +0200 |
commit | 1fae1851e5b35437ac22b46b6786b084fffb8cf2 (patch) | |
tree | bd9f2b3bb7c87d9ead56e4fe51b18475bc93a7fc /target/tricore | |
parent | 2db92a0c0ee867b005ed59507e53d4cef5f5fad0 (diff) |
target/tricore: Use translate_loop
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target/tricore')
-rw-r--r-- | target/tricore/translate.c | 118 |
1 files changed, 74 insertions, 44 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 6b10ae5c47..5fb42abe35 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -8772,7 +8772,7 @@ static void decode_32Bit_opc(DisasContext *ctx) } } -static void decode_opc(DisasContext *ctx, int *is_branch) +static void decode_opc(DisasContext *ctx) { /* 16-Bit Instruction */ if ((ctx->opcode & 0x1) == 0) { @@ -8785,57 +8785,87 @@ static void decode_opc(DisasContext *ctx, int *is_branch) } } -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) +static void tricore_tr_init_disas_context(DisasContextBase *dcbase, + CPUState *cs) { + DisasContext *ctx = container_of(dcbase, DisasContext, base); CPUTriCoreState *env = cs->env_ptr; - DisasContext ctx; - target_ulong pc_start; - int num_insns = 0; - - pc_start = tb->pc; - ctx.base.pc_next = pc_start; - ctx.base.tb = tb; - ctx.base.singlestep_enabled = cs->singlestep_enabled; - ctx.base.is_jmp = DISAS_NEXT; - ctx.mem_idx = cpu_mmu_index(env, false); - ctx.hflags = (uint32_t)tb->flags; - ctx.env = env; - - tcg_clear_temp_count(); - gen_tb_start(tb); - while (ctx.base.is_jmp == DISAS_NEXT) { - tcg_gen_insn_start(ctx.base.pc_next); - num_insns++; - - ctx.opcode = cpu_ldl_code(env, ctx.base.pc_next); - decode_opc(&ctx, 0); - - if (num_insns >= max_insns || tcg_op_buf_full()) { - gen_save_pc(ctx.pc_succ_insn); - tcg_gen_exit_tb(NULL, 0); - break; + ctx->mem_idx = cpu_mmu_index(env, false); + ctx->hflags = (uint32_t)ctx->base.tb->flags; +} + +static void tricore_tr_tb_start(DisasContextBase *db, CPUState *cpu) +{ +} + +static void tricore_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *ctx = container_of(dcbase, DisasContext, base); + + tcg_gen_insn_start(ctx->base.pc_next); +} + +static bool tricore_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu, + const CPUBreakpoint *bp) +{ + return false; +} + +static void tricore_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *ctx = container_of(dcbase, DisasContext, base); + CPUTriCoreState *env = cpu->env_ptr; + + ctx->opcode = cpu_ldl_code(env, ctx->base.pc_next); + decode_opc(ctx); + ctx->base.pc_next = ctx->pc_succ_insn; + + if (ctx->base.is_jmp == DISAS_NEXT) { + target_ulong page_start; + + page_start = ctx->base.pc_first & TARGET_PAGE_MASK; + if (ctx->base.pc_next - page_start >= TARGET_PAGE_SIZE) { + ctx->base.is_jmp = DISAS_TOO_MANY; } - ctx.base.pc_next = ctx.pc_succ_insn; } +} - gen_tb_end(tb, num_insns); - tb->size = ctx.base.pc_next - pc_start; - tb->icount = num_insns; +static void tricore_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *ctx = container_of(dcbase, DisasContext, base); - if (tcg_check_temp_count()) { - printf("LEAK at %08x\n", env->PC); + switch (ctx->base.is_jmp) { + case DISAS_TOO_MANY: + gen_goto_tb(ctx, 0, ctx->base.pc_next); + break; + case DISAS_NORETURN: + break; + default: + g_assert_not_reached(); } +} -#ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) - && qemu_log_in_addr_range(pc_start)) { - qemu_log_lock(); - qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, ctx.base.pc_next - pc_start); - qemu_log("\n"); - qemu_log_unlock(); - } -#endif +static void tricore_tr_disas_log(const DisasContextBase *dcbase, CPUState *cpu) +{ + qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first)); + log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size); +} + +static const TranslatorOps tricore_tr_ops = { + .init_disas_context = tricore_tr_init_disas_context, + .tb_start = tricore_tr_tb_start, + .insn_start = tricore_tr_insn_start, + .breakpoint_check = tricore_tr_breakpoint_check, + .translate_insn = tricore_tr_translate_insn, + .tb_stop = tricore_tr_tb_stop, + .disas_log = tricore_tr_disas_log, +}; + + +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) +{ + DisasContext ctx; + translator_loop(&tricore_tr_ops, &ctx.base, cs, tb, max_insns); } void |