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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-06-21 16:22:55 +0200
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-06-21 18:09:54 +0200
commit8da70480f59b4fd423918ac756747c1e35f6f53a (patch)
tree0f03d6b9b6b9bf82d378ad5e927b519dc97cbade /target/tricore/translate.c
parent82736612e75b84f51d8f3529cb35fa3835de5741 (diff)
target/tricore: Fix RR_JLI clobbering reg A[11]
if A[r1] == A[11], then we would overwrite the destination address of the jump with the return address. Reported-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230621142302.1648383-2-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target/tricore/translate.c')
-rw-r--r--target/tricore/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index d1b319e374..cca52c75b2 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -6064,8 +6064,8 @@ static void decode_rr_idirect(DisasContext *ctx)
tcg_gen_andi_tl(cpu_PC, cpu_gpr_a[r1], ~0x1);
break;
case OPC2_32_RR_JLI:
- tcg_gen_movi_tl(cpu_gpr_a[11], ctx->pc_succ_insn);
tcg_gen_andi_tl(cpu_PC, cpu_gpr_a[r1], ~0x1);
+ tcg_gen_movi_tl(cpu_gpr_a[11], ctx->pc_succ_insn);
break;
case OPC2_32_RR_CALLI:
gen_helper_1arg(call, ctx->pc_succ_insn);