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authorRichard Henderson <richard.henderson@linaro.org>2023-11-04 17:24:01 -0700
committerRichard Henderson <richard.henderson@linaro.org>2024-06-05 09:07:34 -0700
commitfbc5c8d4e8f10fdb780c450aa49b503e6d592cc6 (patch)
tree35e2e5f87d63a726a236225434f03ec49e4290c3 /target/sparc/insns.decode
parent669e077437d5782682e2ac4f1082fcbf102b5680 (diff)
target/sparc: Implement FSLL, FSRL, FSRA, FSLAS
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/sparc/insns.decode')
-rw-r--r--target/sparc/insns.decode9
1 files changed, 9 insertions, 0 deletions
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index 295fc36128..a5eefebfbc 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -408,6 +408,15 @@ FCMPEq 10 000 cc:2 110101 ..... 0 0101 0111 ..... \
FPCMPGT32 10 ..... 110110 ..... 0 0010 1100 ..... @r_d_d
FPCMPEQ32 10 ..... 110110 ..... 0 0010 1110 ..... @r_d_d
+ FSLL16 10 ..... 110110 ..... 0 0010 0001 ..... @d_d_d
+ FSRL16 10 ..... 110110 ..... 0 0010 0011 ..... @d_d_d
+ FSLAS16 10 ..... 110110 ..... 0 0010 1001 ..... @d_d_d
+ FSRA16 10 ..... 110110 ..... 0 0010 1011 ..... @d_d_d
+ FSLL32 10 ..... 110110 ..... 0 0010 0101 ..... @d_d_d
+ FSRL32 10 ..... 110110 ..... 0 0010 0111 ..... @d_d_d
+ FSLAS32 10 ..... 110110 ..... 0 0010 1101 ..... @d_d_d
+ FSRA32 10 ..... 110110 ..... 0 0010 1111 ..... @d_d_d
+
FPCMPULE8 10 ..... 110110 ..... 1 0010 0000 ..... @r_d_d
FPCMPUGT8 10 ..... 110110 ..... 1 0010 1000 ..... @r_d_d
FPCMPNE8 10 ..... 110110 ..... 1 0010 0010 ..... @r_d_d