diff options
author | Manos Pitsidianakis <manos.pitsidianakis@linaro.org> | 2024-02-20 10:52:28 +0200 |
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committer | Michael Tokarev <mjt@tls.msk.ru> | 2024-02-21 08:16:58 +0300 |
commit | 690f50c27d6046f3f34e059ee8e8944eae1b7390 (patch) | |
tree | e4919508f1f6ef93be3117f3e071b4a109877a69 /target/sparc/asi.h | |
parent | 52a56ed2166cad644da3c9b5c2089fe5a2babc0d (diff) |
target/sparc: correct typos
Correct typos automatically found with the `typos` tool
<https://crates.io/crates/typos>
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target/sparc/asi.h')
-rw-r--r-- | target/sparc/asi.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/sparc/asi.h b/target/sparc/asi.h index 3270ed0c7f..a66829674b 100644 --- a/target/sparc/asi.h +++ b/target/sparc/asi.h @@ -145,14 +145,14 @@ * and later ASIs. */ #define ASI_REAL 0x14 /* Real address, cacheable */ -#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ -#define ASI_REAL_IO 0x15 /* Real address, non-cachable */ +#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cacheable */ +#define ASI_REAL_IO 0x15 /* Real address, non-cacheable */ #define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ #define ASI_BLK_AIUP_4V 0x16 /* (4V) Prim, user, block ld/st */ #define ASI_BLK_AIUS_4V 0x17 /* (4V) Sec, user, block ld/st */ #define ASI_REAL_L 0x1c /* Real address, cacheable, LE */ -#define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cachable, little endian*/ -#define ASI_REAL_IO_L 0x1d /* Real address, non-cachable, LE */ +#define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cacheable, little endian*/ +#define ASI_REAL_IO_L 0x1d /* Real address, non-cacheable, LE */ #define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-bit, little endian */ #define ASI_BLK_AIUP_L_4V 0x1e /* (4V) Prim, user, block, l-endian*/ #define ASI_BLK_AIUS_L_4V 0x1f /* (4V) Sec, user, block, l-endian */ |