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authorAlexey Baturo <baturo.alexey@gmail.com>2021-10-25 20:36:09 +0300
committerAlistair Francis <alistair.francis@wdc.com>2021-10-28 14:39:23 +1000
commit0ee9a4e57e1cee4577cab22f6ced6c0c34fb2d94 (patch)
tree7efd84aeb25588873009902dbc7ec665c27546c9 /target/riscv
parent0774a7a1ff24d6b8c2f90b9c341f057914b18134 (diff)
target/riscv: Allow experimental J-ext to be turned on
Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20211025173609.2724490-9-space.monkey.delivers@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/cpu.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 16fac64806..7d53125dbc 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -562,6 +562,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
}
set_vext_version(env, vext_version);
}
+ if (cpu->cfg.ext_j) {
+ ext |= RVJ;
+ }
set_misa(env, env->misa_mxl, ext);
}
@@ -637,6 +640,7 @@ static Property riscv_cpu_properties[] = {
DEFINE_PROP_BOOL("x-zbc", RISCVCPU, cfg.ext_zbc, false),
DEFINE_PROP_BOOL("x-zbs", RISCVCPU, cfg.ext_zbs, false),
DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false),
+ DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false),
DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false),
DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec),
DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128),