diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-13 16:37:36 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2023-10-03 08:01:02 -0700 |
commit | ad75a51e84af9638e4ec51aa1e6ec5f3ff642558 (patch) | |
tree | d6d2af739fb0a9a5dfcd6871a9271eccdf54ab5b /target/riscv/insn_trans/trans_rvm.c.inc | |
parent | a953b5fa153fc384d2631cda8213efe983501609 (diff) |
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv/insn_trans/trans_rvm.c.inc')
-rw-r--r-- | target/riscv/insn_trans/trans_rvm.c.inc | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target/riscv/insn_trans/trans_rvm.c.inc b/target/riscv/insn_trans/trans_rvm.c.inc index 2f0fd1f700..795f0ccf14 100644 --- a/target/riscv/insn_trans/trans_rvm.c.inc +++ b/target/riscv/insn_trans/trans_rvm.c.inc @@ -169,8 +169,8 @@ static bool trans_mulhu(DisasContext *ctx, arg_mulhu *a) static void gen_div_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { - gen_helper_divs_i128(rdl, cpu_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, cpu_env, offsetof(CPURISCVState, retxh)); + gen_helper_divs_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); + tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); } static void gen_div(TCGv ret, TCGv source1, TCGv source2) @@ -212,8 +212,8 @@ static bool trans_div(DisasContext *ctx, arg_div *a) static void gen_divu_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { - gen_helper_divu_i128(rdl, cpu_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, cpu_env, offsetof(CPURISCVState, retxh)); + gen_helper_divu_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); + tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); } static void gen_divu(TCGv ret, TCGv source1, TCGv source2) @@ -244,8 +244,8 @@ static bool trans_divu(DisasContext *ctx, arg_divu *a) static void gen_rem_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { - gen_helper_rems_i128(rdl, cpu_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, cpu_env, offsetof(CPURISCVState, retxh)); + gen_helper_rems_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); + tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); } static void gen_rem(TCGv ret, TCGv source1, TCGv source2) @@ -289,8 +289,8 @@ static bool trans_rem(DisasContext *ctx, arg_rem *a) static void gen_remu_i128(TCGv rdl, TCGv rdh, TCGv rs1l, TCGv rs1h, TCGv rs2l, TCGv rs2h) { - gen_helper_remu_i128(rdl, cpu_env, rs1l, rs1h, rs2l, rs2h); - tcg_gen_ld_tl(rdh, cpu_env, offsetof(CPURISCVState, retxh)); + gen_helper_remu_i128(rdl, tcg_env, rs1l, rs1h, rs2l, rs2h); + tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh)); } static void gen_remu(TCGv ret, TCGv source1, TCGv source2) |