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authorAlistair Francis <alistair.francis@wdc.com>2020-08-12 12:13:49 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-08-25 09:11:36 -0700
commite39a8320b088dd5efc9ebaafe387e52b3d962665 (patch)
treebe1a09e13c4e3d30200146316abb2d847590f8af /target/riscv/cpu_bits.h
parent57cb2083e638bb28616c059cbf067d99552a04bb (diff)
target/riscv: Support the Virtual Instruction fault
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 4c744dce9b0b057cbb5cc0f4d4ac75cda682a8af.1597259519.git.alistair.francis@wdc.com Message-Id: <4c744dce9b0b057cbb5cc0f4d4ac75cda682a8af.1597259519.git.alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu_bits.h')
-rw-r--r--target/riscv/cpu_bits.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index d88e2ea30d..bd36062877 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -461,6 +461,11 @@
#define HSTATUS_WPRI HSTATUS64_WPRI
#endif
+#define HCOUNTEREN_CY (1 << 0)
+#define HCOUNTEREN_TM (1 << 1)
+#define HCOUNTEREN_IR (1 << 2)
+#define HCOUNTEREN_HPM3 (1 << 3)
+
/* Privilege modes */
#define PRV_U 0
#define PRV_S 1
@@ -553,6 +558,7 @@
#define RISCV_EXCP_STORE_PAGE_FAULT 0xf /* since: priv-1.10.0 */
#define RISCV_EXCP_INST_GUEST_PAGE_FAULT 0x14
#define RISCV_EXCP_LOAD_GUEST_ACCESS_FAULT 0x15
+#define RISCV_EXCP_VIRT_INSTRUCTION_FAULT 0x16
#define RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAULT 0x17
#define RISCV_EXCP_INT_FLAG 0x80000000