diff options
| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2023-02-15 10:05:29 +0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-01 14:59:24 -0800 |
| commit | a7336161f025c114fc57595801a492d8222540ec (patch) | |
| tree | 451e7a908ee700d7dab54bdad36c34a4f4dc55c0 /target/riscv/cpu.h | |
| parent | 94bdf6ee107718ad724b7d2f06633836a06b8143 (diff) | |
target/riscv: Add cfg properties for Zv* extensions
Add properties for Zve64d,Zvfh,Zvfhmin extensions.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230215020539.4788-5-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'target/riscv/cpu.h')
| -rw-r--r-- | target/riscv/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 31537fc05f..7f5264e165 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -462,7 +462,10 @@ struct RISCVCPUConfig { bool ext_zhinxmin; bool ext_zve32f; bool ext_zve64f; + bool ext_zve64d; bool ext_zmmul; + bool ext_zvfh; + bool ext_zvfhmin; bool ext_smaia; bool ext_ssaia; bool ext_sscofpmf; |