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| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2023-02-15 10:05:28 +0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-01 14:57:32 -0800 |
| commit | 94bdf6ee107718ad724b7d2f06633836a06b8143 (patch) | |
| tree | 605d7c3cf14e043e510ade632173d77e0930e6f3 /target/riscv/cpu.h | |
| parent | a0d805f035ff7132949a4a7e82d7742c243927ed (diff) | |
target/riscv: Simplify the check for Zfhmin and Zhinxmin
We needn't check Zfh and Zhinx in these instructions.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230215020539.4788-4-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'target/riscv/cpu.h')
0 files changed, 0 insertions, 0 deletions