Merge patch series "target/riscv: Add support for Svadu extension"

Weiwei Li <liweiwei@iscas.ac.cn> says:

This patchset adds support svadu extension. It also fixes some
relationship between *envcfg fields and Svpbmt/Sstc extensions.

Specification for Svadu extension can be found in:

https://github.com/riscv/riscv-svadu

* b4-shazam-merge:
  target/riscv: Export Svadu property
  target/riscv: Add *envcfg.HADE related check in address translation
  target/riscv: Add *envcfg.PBMTE related check in address translation
  target/riscv: Add csr support for svadu
  target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and henvcfg
  target/riscv: Fix the relationship between menvcfg.PBMTE/STCE and Svpbmt/Sstc extensions

Message-ID: <20230224040852.37109-1-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 30c75bf7d6..665b4c60b0 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -438,6 +438,7 @@ struct RISCVCPUConfig {
     bool ext_zihintpause;
     bool ext_smstateen;
     bool ext_sstc;
+    bool ext_svadu;
     bool ext_svinval;
     bool ext_svnapot;
     bool ext_svpbmt;