diff options
author | Stafford Horne <shorne@gmail.com> | 2023-02-14 18:41:29 +0900 |
---|---|---|
committer | Stafford Horne <shorne@gmail.com> | 2023-05-11 15:40:03 +0100 |
commit | 9156ca76cb39ff1d72e701dec4a907f73592d88f (patch) | |
tree | 362e0706457c8c89dc34ddb96d644b5808d1b2e1 /target/openrisc | |
parent | 08f021de3af599b8ca4c745f324a3559dc2990d3 (diff) |
target/openrisc: Set PC to cpu state on FPU exception
Store the PC to ensure the correct value can be read in the exception
handler.
Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/openrisc')
-rw-r--r-- | target/openrisc/fpu_helper.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/target/openrisc/fpu_helper.c b/target/openrisc/fpu_helper.c index f9e34fa2cc..8b81d2f62f 100644 --- a/target/openrisc/fpu_helper.c +++ b/target/openrisc/fpu_helper.c @@ -20,8 +20,8 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "exec/exec-all.h" #include "exec/helper-proto.h" -#include "exception.h" #include "fpu/softfloat.h" static int ieee_ex_to_openrisc(int fexcp) @@ -45,6 +45,15 @@ static int ieee_ex_to_openrisc(int fexcp) return ret; } +static G_NORETURN +void do_fpe(CPUOpenRISCState *env, uintptr_t pc) +{ + CPUState *cs = env_cpu(env); + + cs->exception_index = EXCP_FPE; + cpu_loop_exit_restore(cs, pc); +} + void HELPER(update_fpcsr)(CPUOpenRISCState *env) { int tmp = get_float_exception_flags(&env->fp_status); @@ -55,7 +64,7 @@ void HELPER(update_fpcsr)(CPUOpenRISCState *env) if (tmp) { env->fpcsr |= tmp; if (env->fpcsr & FPCSR_FPEE) { - helper_exception(env, EXCP_FPE); + do_fpe(env, GETPC()); } } } |