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authorPeter Maydell <peter.maydell@linaro.org>2022-11-24 11:50:15 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-12-16 15:58:15 +0000
commit040975047972b68f1cd06358e5fe4a144f90bee9 (patch)
treeaad6259bb9f72ba400efda1bcf16f878321dfa47 /target/openrisc/cpu.h
parent4245a71662648b804ccc19163f44f75d6e92dcad (diff)
target/openrisc: Convert to 3-phase reset
Convert the openrisc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-id: 20221124115023.2437291-13-peter.maydell@linaro.org
Diffstat (limited to 'target/openrisc/cpu.h')
-rw-r--r--target/openrisc/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 1d5efa5ca2..5f60749705 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -34,7 +34,7 @@ OBJECT_DECLARE_CPU_TYPE(OpenRISCCPU, OpenRISCCPUClass, OPENRISC_CPU)
/**
* OpenRISCCPUClass:
* @parent_realize: The parent class' realize handler.
- * @parent_reset: The parent class' reset handler.
+ * @parent_phases: The parent class' reset phase handlers.
*
* A OpenRISC CPU model.
*/
@@ -44,7 +44,7 @@ struct OpenRISCCPUClass {
/*< public >*/
DeviceRealize parent_realize;
- DeviceReset parent_reset;
+ ResettablePhases parent_phases;
};
#define TARGET_INSN_START_EXTRA_WORDS 1