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authorPaolo Bonzini <pbonzini@redhat.com>2022-12-18 01:06:45 +0100
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2023-01-13 09:32:32 +0100
commita844873512400fae6bed9e87694dc96ff2f15f39 (patch)
tree42a8f01732a9e7cbc7abd2af5b39b05489a4b634 /target/mips
parentc12b1e67d50c01f6ba78abcdaaa533abaf71b664 (diff)
mips: Remove support for trap and emulate KVM
This support was limited to the Malta board, drop it. I do not have a machine that can run VZ KVM, so I am assuming that it works for -M malta as well. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221221091718.71844-1-philmd@linaro.org>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/cpu.c7
-rw-r--r--target/mips/cpu.h3
-rw-r--r--target/mips/internal.h3
-rw-r--r--target/mips/kvm.c11
-rw-r--r--target/mips/sysemu/addr.c17
-rw-r--r--target/mips/sysemu/physaddr.c13
6 files changed, 2 insertions, 52 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index c614b04607..052e54bda3 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -292,12 +292,7 @@ static void mips_cpu_reset_hold(Object *obj)
env->tlb->tlb_in_use = env->tlb->nb_tlb;
env->CP0_Wired = 0;
env->CP0_GlobalNumber = (cs->cpu_index & 0xFF) << CP0GN_VPId;
- env->CP0_EBase = (cs->cpu_index & 0x3FF);
- if (mips_um_ksegs_enabled()) {
- env->CP0_EBase |= 0x40000000;
- } else {
- env->CP0_EBase |= (int32_t)0x80000000;
- }
+ env->CP0_EBase = KSEG0_BASE | (cs->cpu_index & 0x3FF);
if (env->CP0_Config3 & (1 << CP0C3_CMGCR)) {
env->CP0_CMGCRBase = 0x1fbf8000 >> 4;
}
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 0a085643a3..caf2b06911 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1296,11 +1296,8 @@ void cpu_set_exception_base(int vp_index, target_ulong address);
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
-uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr);
uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr);
-bool mips_um_ksegs_enabled(void);
-void mips_um_ksegs_enable(void);
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 57b312689a..4b0031d10d 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -99,9 +99,6 @@ int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
#define KSEG2_BASE ((target_ulong)(int32_t)0xC0000000UL)
#define KSEG3_BASE ((target_ulong)(int32_t)0xE0000000UL)
-#define KVM_KSEG0_BASE ((target_ulong)(int32_t)0x40000000UL)
-#define KVM_KSEG2_BASE ((target_ulong)(int32_t)0x60000000UL)
-
#if !defined(CONFIG_USER_ONLY)
enum {
diff --git a/target/mips/kvm.c b/target/mips/kvm.c
index bcb8e06b2c..c14e8f550f 100644
--- a/target/mips/kvm.c
+++ b/target/mips/kvm.c
@@ -1268,25 +1268,16 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
int mips_kvm_type(MachineState *machine, const char *vm_type)
{
-#if defined(KVM_CAP_MIPS_VZ) || defined(KVM_CAP_MIPS_TE)
+#if defined(KVM_CAP_MIPS_VZ)
int r;
KVMState *s = KVM_STATE(machine->accelerator);
-#endif
-#if defined(KVM_CAP_MIPS_VZ)
r = kvm_check_extension(s, KVM_CAP_MIPS_VZ);
if (r > 0) {
return KVM_VM_MIPS_VZ;
}
#endif
-#if defined(KVM_CAP_MIPS_TE)
- r = kvm_check_extension(s, KVM_CAP_MIPS_TE);
- if (r > 0) {
- return KVM_VM_MIPS_TE;
- }
-#endif
-
return -1;
}
diff --git a/target/mips/sysemu/addr.c b/target/mips/sysemu/addr.c
index 86f1c129c9..4f025be44a 100644
--- a/target/mips/sysemu/addr.c
+++ b/target/mips/sysemu/addr.c
@@ -23,8 +23,6 @@
#include "qemu/osdep.h"
#include "cpu.h"
-static int mips_um_ksegs;
-
uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
{
return addr & 0x1fffffffll;
@@ -35,11 +33,6 @@ uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
return addr | ~0x7fffffffll;
}
-uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr)
-{
- return addr | 0x40000000ll;
-}
-
uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr)
{
return addr & 0x1fffffffll;
@@ -49,13 +42,3 @@ uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr)
{
return (addr & 0x1fffffffll) | 0xffffffffa0000000ll;
}
-
-bool mips_um_ksegs_enabled(void)
-{
- return mips_um_ksegs;
-}
-
-void mips_um_ksegs_enable(void)
-{
- mips_um_ksegs = 1;
-}
diff --git a/target/mips/sysemu/physaddr.c b/target/mips/sysemu/physaddr.c
index 1918633aa1..2970df8a09 100644
--- a/target/mips/sysemu/physaddr.c
+++ b/target/mips/sysemu/physaddr.c
@@ -130,19 +130,6 @@ int get_physical_address(CPUMIPSState *env, hwaddr *physical,
/* effective address (modified for KVM T&E kernel segments) */
target_ulong address = real_address;
- if (mips_um_ksegs_enabled()) {
- /* KVM T&E adds guest kernel segments in useg */
- if (real_address >= KVM_KSEG0_BASE) {
- if (real_address < KVM_KSEG2_BASE) {
- /* kseg0 */
- address += KSEG0_BASE - KVM_KSEG0_BASE;
- } else if (real_address <= USEG_LIMIT) {
- /* kseg2/3 */
- address += KSEG2_BASE - KVM_KSEG2_BASE;
- }
- }
- }
-
if (address <= USEG_LIMIT) {
/* useg */
uint16_t segctl;