diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-10-19 09:38:11 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-11-02 14:32:32 +0100 |
| commit | 7e9db46d645dca27f28ec28e0fc479778e410d5f (patch) | |
| tree | 273b33768d4da42e4ff9621a2345ae289a54bf53 /target/mips | |
| parent | 340ee8b3f1872c7f8969a5eb48fc3b5a9284e27b (diff) | |
target/mips: Use enum definitions from CPUMIPSMSADataFormat enum
Replace magic DataFormat value by the corresponding
enum from CPUMIPSMSADataFormat.
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211028210843.2120802-7-f4bug@amsat.org>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/tcg/msa_translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index e0ccd8c1cb..56a0148fec 100644 --- a/target/mips/tcg/msa_translate.c +++ b/target/mips/tcg/msa_translate.c @@ -1791,10 +1791,10 @@ static void gen_msa_3rf(DisasContext *ctx) case OPC_MULR_Q_df: case OPC_MADDR_Q_df: case OPC_MSUBR_Q_df: - tdf = tcg_constant_i32(df + 1); + tdf = tcg_constant_i32(DF_HALF + df); break; default: - tdf = tcg_constant_i32(df + 2); + tdf = tcg_constant_i32(DF_WORD + df); break; } @@ -2023,7 +2023,7 @@ static void gen_msa_2rf(DisasContext *ctx) TCGv_i32 twd = tcg_const_i32(wd); TCGv_i32 tws = tcg_const_i32(ws); /* adjust df value for floating-point instruction */ - TCGv_i32 tdf = tcg_constant_i32(df + 2); + TCGv_i32 tdf = tcg_constant_i32(DF_WORD + df); switch (MASK_MSA_2RF(ctx->opcode)) { case OPC_FCLASS_df: |