diff options
| author | Marcin Nowakowski <marcin.nowakowski@fungible.com> | 2023-02-16 06:17:16 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-03-08 00:37:48 +0100 |
| commit | 36b84f856ed67f5b2ee2e26368f7009f3222ba46 (patch) | |
| tree | 245e3cd89a701498b26445d09fe39b417b27e5c7 /target/mips/cpu.c | |
| parent | 7c00edb9a2e2cb975a60e80dbe1e66287a9d5777 (diff) | |
target/mips: Implement CP0.Config7.WII bit support
Some pre-release 6 cores use CP0.Config7.WII bit to indicate that a
disabled interrupt should wake up a sleeping CPU.
Enable this bit by default for M14K(c) and P5600. There are potentially
other cores that support this feature, but I do not have a complete
list.
Signed-off-by: Marcin Nowakowski <marcin.nowakowski@fungible.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230216051717.3911212-4-marcin.nowakowski@fungible.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'target/mips/cpu.c')
| -rw-r--r-- | target/mips/cpu.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 05caf54999..543da911e3 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -143,11 +143,13 @@ static bool mips_cpu_has_work(CPUState *cs) /* * Prior to MIPS Release 6 it is implementation dependent if non-enabled * interrupts wake-up the CPU, however most of the implementations only - * check for interrupts that can be taken. + * check for interrupts that can be taken. For pre-release 6 CPUs, + * check for CP0 Config7 'Wait IE ignore' bit. */ if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || + (env->CP0_Config7 & (1 << CP0C7_WII)) || (env->insn_flags & ISA_MIPS_R6)) { has_work = true; } |