diff options
| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2018-04-15 23:18:49 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2018-05-29 09:35:14 +0200 |
| commit | a2207b593b6d7e164e6d4a587aec4cd885a8e855 (patch) | |
| tree | d1f82ee76022f8c22372d426fbed5f3a2a5201c0 /target/microblaze/mmu.c | |
| parent | a1b48e3a3aa19d6e03b6c39cae4e915f5cceb028 (diff) | |
target-microblaze: mmu: Add R_TBLX_MISS macros
Add a R_TBLX_MISS MASK and SHIFT macros.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/mmu.c')
| -rw-r--r-- | target/microblaze/mmu.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c index 0019ebd18f..f4a4c339c9 100644 --- a/target/microblaze/mmu.c +++ b/target/microblaze/mmu.c @@ -292,8 +292,9 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v) v & TLB_EPN_MASK, 0, cpu_mmu_index(env, false)); if (hit) { env->mmu.regs[MMU_R_TLBX] = lu.idx; - } else - env->mmu.regs[MMU_R_TLBX] |= 0x80000000; + } else { + env->mmu.regs[MMU_R_TLBX] |= R_TBLX_MISS_MASK; + } break; } default: |