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authorXinyu Li <lixinyu20s@ict.ac.cn>2023-05-10 22:52:22 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2023-05-18 08:53:50 +0200
commit056d649007bc9fdae9f1d576e77c1316e9a34468 (patch)
treec581fc1eb26494cdafa03ab9813dedf06992a371 /target/i386/ops_sse.h
parent2b55e479e6fcbb466585fd25077a50c32e10dc3a (diff)
target/i386: fix avx2 instructions vzeroall and vpermdq
vzeroall: xmm_regs should be used instead of xmm_t0 vpermdq: bit 3 and 7 of imm should be considered Signed-off-by: Xinyu Li <lixinyu20s@ict.ac.cn> Message-Id: <20230510145222.586487-1-lixinyu20s@ict.ac.cn> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/ops_sse.h')
-rw-r--r--target/i386/ops_sse.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 0bd6bfad8a..fb63af7afa 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -2497,6 +2497,14 @@ void helper_vpermdq_ymm(Reg *d, Reg *v, Reg *s, uint32_t order)
d->Q(1) = r1;
d->Q(2) = r2;
d->Q(3) = r3;
+ if (order & 0x8) {
+ d->Q(0) = 0;
+ d->Q(1) = 0;
+ }
+ if (order & 0x80) {
+ d->Q(2) = 0;
+ d->Q(3) = 0;
+ }
}
void helper_vpermq_ymm(Reg *d, Reg *s, uint32_t order)