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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-04-06 16:04:33 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-04-06 16:04:33 +0100 |
| commit | 4216ba1b2279a3922814d96e6acfb81a85d2dee2 (patch) | |
| tree | 2055abea5dd75c59fcf5e68cb123aa1cf8d0570c /target/arm/cpu64.c | |
| parent | 259e909790c83995436938a2b7af464b5d63d4c3 (diff) | |
| parent | 49bc76550c37f4a2b92a05cb3e6989a739d56ac9 (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210406' into staging
target-arm queue:
* ppc/e500 and arm/virt: only add valid dynamic sysbus devices to the
platform bus
* update i.mx31 maintainer list
* Revert "target/arm: Make number of counters in PMCR follow the CPU"
# gpg: Signature made Tue 06 Apr 2021 13:25:54 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210406:
Remove myself as i.mx31 maintainer
Revert "target/arm: Make number of counters in PMCR follow the CPU"
hw/ppc/e500plat: Only try to add valid dynamic sysbus devices to platform bus
hw/arm/virt: Only try to add valid dynamic sysbus devices to platform bus
machine: Provide a function to check the dynamic sysbus allowlist
include/hw/boards.h: Document machine_class_allow_dynamic_sysbus_dev()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu64.c')
| -rw-r--r-- | target/arm/cpu64.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 5d9d56a33c..f0a9e968c9 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -141,7 +141,6 @@ static void aarch64_a57_initfn(Object *obj) cpu->gic_num_lrs = 4; cpu->gic_vpribits = 5; cpu->gic_vprebits = 5; - cpu->isar.reset_pmcr_el0 = 0x41013000; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); } @@ -195,7 +194,6 @@ static void aarch64_a53_initfn(Object *obj) cpu->gic_num_lrs = 4; cpu->gic_vpribits = 5; cpu->gic_vprebits = 5; - cpu->isar.reset_pmcr_el0 = 0x41033000; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); } @@ -247,7 +245,6 @@ static void aarch64_a72_initfn(Object *obj) cpu->gic_num_lrs = 4; cpu->gic_vpribits = 5; cpu->gic_vprebits = 5; - cpu->isar.reset_pmcr_el0 = 0x41023000; define_arm_cp_regs(cpu, cortex_a72_a57_a53_cp_reginfo); } |