diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-12-05 07:15:21 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-12-08 18:48:26 +0000 |
| commit | 4e41d2f5830a76d3fe92b3d3b18cc9f2ee927770 (patch) | |
| tree | 60e3cc172d4aa177b460d5e72b176a8bd3c95915 /target-xtensa/overlay_tool.h | |
| parent | fcc803d119a4c01a9b0ee5bda35fda1eeabffa33 (diff) | |
target-xtensa: implement CACHEATTR SR
In XEA1, the Options for Memory Protection and Translation and the
corresponding TLB management instructions are not available. Instead,
functionality similar to the Region Protection Option is available
through the cache attribute register. See ISA, A.2.14 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa/overlay_tool.h')
| -rw-r--r-- | target-xtensa/overlay_tool.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h index 50bf5735e9..45205b8e67 100644 --- a/target-xtensa/overlay_tool.h +++ b/target-xtensa/overlay_tool.h @@ -91,6 +91,7 @@ XCHAL_OPTION(XCHAL_HAVE_XLT_CACHEATTR, \ XTENSA_OPTION_REGION_TRANSLATION) | \ XCHAL_OPTION(XCHAL_HAVE_PTP_MMU, XTENSA_OPTION_MMU) | \ + XCHAL_OPTION(XCHAL_HAVE_CACHEATTR, XTENSA_OPTION_CACHEATTR) | \ /* Other, TODO */ \ XCHAL_OPTION(XCHAL_HAVE_WINDOWED, XTENSA_OPTION_WINDOWED_REGISTER) | \ XCHAL_OPTION(XCHAL_HAVE_DEBUG, XTENSA_OPTION_DEBUG)) |