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author | Peter Maydell <peter.maydell@linaro.org> | 2015-10-22 17:33:54 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2015-10-22 17:33:54 +0100 |
commit | b803894e2c4d744ccc113ca6cbe6654ec80c1dc6 (patch) | |
tree | aed47a20518d0623449f3c642bc69f5b4bdecea8 /target-sparc | |
parent | ca3e40e233e87f7b29442311736a82da01c0df7b (diff) | |
parent | 0960be7cffa7b30189f2f0f76b1ac3c8115660f3 (diff) |
Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into staging
QOM CPUState and X86CPU
* Adoption of CPUClass::disas_set_info() hook
# gpg: Signature made Thu 22 Oct 2015 17:11:24 BST using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"
* remotes/afaerber/tags/qom-cpu-for-peter:
disas: QOMify alpha specific disas setup
disas: QOMify mips specific disas setup
disas: QOMify sh4 specific disas setup
disas: QOMify lm32 specific disas setup
disas: QOMify sparc specific disas setup
disas: QOMify m68k specific disas setup
disas: QOMify moxie specific disas setup
disas: QOMify s390x specific disas setup
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-sparc')
-rw-r--r-- | target-sparc/cpu.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 82bb72ab79..d98682b563 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -90,6 +90,14 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } +static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info) +{ + info->print_insn = print_insn_sparc; +#ifdef TARGET_SPARC64 + info->mach = bfd_mach_sparc_v9b; +#endif +} + static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model) { CPUClass *cc = CPU_GET_CLASS(cpu); @@ -848,6 +856,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->do_unaligned_access = sparc_cpu_do_unaligned_access; cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug; #endif + cc->disas_set_info = cpu_sparc_disas_set_info; #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) cc->gdb_num_core_regs = 86; |