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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-19 14:47:40 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-19 14:47:40 +0000
commit8294eba18726b897c6a497b36ecd74a793f90523 (patch)
tree21b8d8a1e19a3e6be69dd6d7ad6ba10b0c6729ac /target-sparc
parentee999a8899ba8c6326cda4e2e70bb52b284cf7bb (diff)
SPARC host fixes, by Ben Taylor.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/exec.h19
1 files changed, 1 insertions, 18 deletions
diff --git a/target-sparc/exec.h b/target-sparc/exec.h
index 6e0515f6e9..934f5ce965 100644
--- a/target-sparc/exec.h
+++ b/target-sparc/exec.h
@@ -1,13 +1,9 @@
#ifndef EXEC_SPARC_H
#define EXEC_SPARC_H 1
-#include "dyngen-exec.h"
#include "config.h"
+#include "dyngen-exec.h"
-#if defined(__sparc__)
-struct CPUSPARCState *env;
-#else
register struct CPUSPARCState *env asm(AREG0);
-#endif
#ifdef TARGET_SPARC64
#define T0 (env->t0)
@@ -15,13 +11,8 @@ register struct CPUSPARCState *env asm(AREG0);
#define T2 (env->t2)
#define REGWPTR env->regwptr
#else
-#if defined(__sparc__)
-register uint32_t T0 asm(AREG3);
-register uint32_t T1 asm(AREG2);
-#else
register uint32_t T0 asm(AREG1);
register uint32_t T1 asm(AREG2);
-#endif
#undef REG_REGWPTR // Broken
#ifdef REG_REGWPTR
@@ -33,11 +24,7 @@ register uint32_t *REGWPTR asm(AREG3);
#define reg_REGWPTR
#ifdef AREG4
-#if defined(__sparc__)
-register uint32_t T2 asm(AREG0);
-#else
register uint32_t T2 asm(AREG4);
-#endif
#define reg_T2
#else
#define T2 (env->t2)
@@ -45,14 +32,10 @@ register uint32_t T2 asm(AREG4);
#else
#define REGWPTR env->regwptr
-#if defined(__sparc__)
-register uint32_t T2 asm(AREG0);
-#else
register uint32_t T2 asm(AREG3);
#endif
#define reg_T2
#endif
-#endif
#define FT0 (env->ft0)
#define FT1 (env->ft1)