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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-13 18:57:37 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-13 18:57:37 +0000 |
commit | 71968fa65b9088fa746a5b99c093a7e835e3fade (patch) | |
tree | e24f5bb18f1bfe5a67e64210ea92c21c031cc6a6 /target-sh4/cpu.h | |
parent | a9c43f8ede0e0c7b89432e0ddd4894c5f917fd0b (diff) |
target-sh4: add prefi, icbi, synco
(Vladimir Prus)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6013 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/cpu.h')
-rw-r--r-- | target-sh4/cpu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 687b703637..ec4aacedac 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -89,6 +89,10 @@ typedef struct tlb_t { #define NB_MMU_MODES 2 +enum sh_features { + SH_FEATURE_SH4A = 1, +}; + typedef struct CPUSH4State { int id; /* CPU model */ @@ -113,6 +117,9 @@ typedef struct CPUSH4State { /* float point status register */ float_status fp_status; + /* The features that we should emulate. See sh_features above. */ + uint32_t features; + /* Those belong to the specific unit (SH7750) but are handled here */ uint32_t mmucr; /* MMU control register */ uint32_t pteh; /* page table entry high register */ |