diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2015-05-25 01:28:56 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2015-06-12 12:02:48 +0200 |
| commit | 5ed9a259c164bb9fd2a6fe8a363a4bda2e4a5461 (patch) | |
| tree | 16aad439a363352e18a52243f82d5fb3789344be /target-sh4/cpu.c | |
| parent | 563807520ff19e6ed2d40695f543f1fba7ba432f (diff) | |
target-sh4: use bit number for SR constants
Use the bit number for SR constants instead of using a bit mask. This
make possible to also use the constants for shifts.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-sh4/cpu.c')
| -rw-r--r-- | target-sh4/cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index d187a2bdba..cccb14fe7b 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -61,7 +61,8 @@ static void superh_cpu_reset(CPUState *s) env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */ set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */ #else - env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; + env->sr = (1u << SR_MD) | (1u << SR_RB) | (1u << SR_BL) | + (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << SR_I0); env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ set_float_rounding_mode(float_round_to_zero, &env->fp_status); set_flush_to_zero(1, &env->fp_status); |