diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-01-03 23:43:32 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-01-03 23:43:32 +0000 |
commit | 0fa85d43d47151e71e63754e419340bfcff97e80 (patch) | |
tree | ee797bd86bf4c5e0b6e33b462248da86408ce12c /target-ppc | |
parent | b4ff59872759eb491313ae4248732d9a2acc1299 (diff) |
64 bit target support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/exec.h | 3 | ||||
-rw-r--r-- | target-ppc/helper.c | 6 | ||||
-rw-r--r-- | target-ppc/op_helper_mem.h | 8 | ||||
-rw-r--r-- | target-ppc/op_mem.h | 44 | ||||
-rw-r--r-- | target-ppc/translate.c | 10 |
5 files changed, 36 insertions, 35 deletions
diff --git a/target-ppc/exec.h b/target-ppc/exec.h index 50c51502ce..503cf26c6d 100644 --- a/target-ppc/exec.h +++ b/target-ppc/exec.h @@ -173,4 +173,7 @@ static inline void regs_to_env(void) { } +int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, + int is_user, int is_softmmu); + #endif /* !defined (__PPC_H__) */ diff --git a/target-ppc/helper.c b/target-ppc/helper.c index de646727a6..5d41fcb058 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -29,8 +29,6 @@ /*****************************************************************************/ /* PPC MMU emulation */ -int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, - int is_user, int is_softmmu); /* Perform BAT hit & translation */ static int get_bat (CPUState *env, uint32_t *real, int *prot, @@ -421,7 +419,7 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr) NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(unsigned long addr, int is_write, int is_user, void *retaddr) +void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr) { TranslationBlock *tb; CPUState *saved_env; @@ -782,7 +780,7 @@ void do_interrupt (CPUState *env) /* Store exception cause */ /* Get rS/rD and rA from faulting opcode */ env->spr[DSISR] |= - (ldl_code((void *)(env->nip - 4)) & 0x03FF0000) >> 16; + (ldl_code((env->nip - 4)) & 0x03FF0000) >> 16; /* data location address has been stored * when the fault has been detected */ diff --git a/target-ppc/op_helper_mem.h b/target-ppc/op_helper_mem.h index f3d5a16752..85ac91163c 100644 --- a/target-ppc/op_helper_mem.h +++ b/target-ppc/op_helper_mem.h @@ -8,14 +8,14 @@ void glue(do_lsw, MEMSUFFIX) (int dst) __func__, T0, T1, dst); } for (; T1 > 3; T1 -= 4, T0 += 4) { - ugpr(dst++) = glue(ldl, MEMSUFFIX)((void *)T0); + ugpr(dst++) = glue(ldl, MEMSUFFIX)(T0); if (dst == 32) dst = 0; } if (T1 > 0) { tmp = 0; for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) { - tmp |= glue(ldub, MEMSUFFIX)((void *)T0) << sh; + tmp |= glue(ldub, MEMSUFFIX)(T0) << sh; } ugpr(dst) = tmp; } @@ -30,13 +30,13 @@ void glue(do_stsw, MEMSUFFIX) (int src) __func__, T0, T1, src); } for (; T1 > 3; T1 -= 4, T0 += 4) { - glue(stl, MEMSUFFIX)((void *)T0, ugpr(src++)); + glue(stl, MEMSUFFIX)(T0, ugpr(src++)); if (src == 32) src = 0; } if (T1 > 0) { for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) - glue(stb, MEMSUFFIX)((void *)T0, (ugpr(src) >> sh) & 0xFF); + glue(stb, MEMSUFFIX)(T0, (ugpr(src) >> sh) & 0xFF); } } diff --git a/target-ppc/op_mem.h b/target-ppc/op_mem.h index b5d10cecb8..f0f0cd1b34 100644 --- a/target-ppc/op_mem.h +++ b/target-ppc/op_mem.h @@ -2,26 +2,26 @@ void glue(do_lsw, MEMSUFFIX) (int dst); void glue(do_stsw, MEMSUFFIX) (int src); -static inline uint16_t glue(ld16r, MEMSUFFIX) (void *EA) +static inline uint16_t glue(ld16r, MEMSUFFIX) (target_ulong EA) { uint16_t tmp = glue(lduw, MEMSUFFIX)(EA); return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); } -static inline uint32_t glue(ld32r, MEMSUFFIX) (void *EA) +static inline uint32_t glue(ld32r, MEMSUFFIX) (target_ulong EA) { uint32_t tmp = glue(ldl, MEMSUFFIX)(EA); return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | ((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); } -static inline void glue(st16r, MEMSUFFIX) (void *EA, uint16_t data) +static inline void glue(st16r, MEMSUFFIX) (target_ulong EA, uint16_t data) { uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8); glue(stw, MEMSUFFIX)(EA, tmp); } -static inline void glue(st32r, MEMSUFFIX) (void *EA, uint32_t data) +static inline void glue(st32r, MEMSUFFIX) (target_ulong EA, uint32_t data) { uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) | ((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24); @@ -32,14 +32,14 @@ static inline void glue(st32r, MEMSUFFIX) (void *EA, uint32_t data) #define PPC_LD_OP(name, op) \ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ { \ - T1 = glue(op, MEMSUFFIX)((void *)T0); \ + T1 = glue(op, MEMSUFFIX)(T0); \ RETURN(); \ } #define PPC_ST_OP(name, op) \ PPC_OP(glue(glue(st, name), MEMSUFFIX)) \ { \ - glue(op, MEMSUFFIX)((void *)T0, T1); \ + glue(op, MEMSUFFIX)(T0, T1); \ RETURN(); \ } @@ -65,7 +65,7 @@ PPC_OP(glue(lmw, MEMSUFFIX)) int dst = PARAM(1); for (; dst < 32; dst++, T0 += 4) { - ugpr(dst) = glue(ldl, MEMSUFFIX)((void *)T0); + ugpr(dst) = glue(ldl, MEMSUFFIX)(T0); } RETURN(); } @@ -75,7 +75,7 @@ PPC_OP(glue(stmw, MEMSUFFIX)) int src = PARAM(1); for (; src < 32; src++, T0 += 4) { - glue(stl, MEMSUFFIX)((void *)T0, ugpr(src)); + glue(stl, MEMSUFFIX)(T0, ugpr(src)); } RETURN(); } @@ -115,7 +115,7 @@ PPC_OP(glue(stsw, MEMSUFFIX)) #define PPC_STF_OP(name, op) \ PPC_OP(glue(glue(st, name), MEMSUFFIX)) \ { \ - glue(op, MEMSUFFIX)((void *)T0, FT1); \ + glue(op, MEMSUFFIX)(T0, FT1); \ RETURN(); \ } @@ -126,7 +126,7 @@ PPC_STF_OP(fs, stfl); #define PPC_LDF_OP(name, op) \ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ { \ - FT1 = glue(op, MEMSUFFIX)((void *)T0); \ + FT1 = glue(op, MEMSUFFIX)(T0); \ RETURN(); \ } @@ -139,7 +139,7 @@ PPC_OP(glue(lwarx, MEMSUFFIX)) if (T0 & 0x03) { do_raise_exception(EXCP_ALIGN); } else { - T1 = glue(ldl, MEMSUFFIX)((void *)T0); + T1 = glue(ldl, MEMSUFFIX)(T0); regs->reserve = T0; } RETURN(); @@ -154,7 +154,7 @@ PPC_OP(glue(stwcx, MEMSUFFIX)) if (regs->reserve != T0) { env->crf[0] = xer_ov; } else { - glue(stl, MEMSUFFIX)((void *)T0, T1); + glue(stl, MEMSUFFIX)(T0, T1); env->crf[0] = xer_ov | 0x02; } } @@ -164,27 +164,27 @@ PPC_OP(glue(stwcx, MEMSUFFIX)) PPC_OP(glue(dcbz, MEMSUFFIX)) { - glue(stl, MEMSUFFIX)((void *)(T0 + 0x00), 0); - glue(stl, MEMSUFFIX)((void *)(T0 + 0x04), 0); - glue(stl, MEMSUFFIX)((void *)(T0 + 0x08), 0); - glue(stl, MEMSUFFIX)((void *)(T0 + 0x0C), 0); - glue(stl, MEMSUFFIX)((void *)(T0 + 0x10), 0); - glue(stl, MEMSUFFIX)((void *)(T0 + 0x14), 0); - glue(stl, MEMSUFFIX)((void *)(T0 + 0x18), 0); - glue(stl, MEMSUFFIX)((void *)(T0 + 0x1C), 0); + glue(stl, MEMSUFFIX)(T0 + 0x00, 0); + glue(stl, MEMSUFFIX)(T0 + 0x04, 0); + glue(stl, MEMSUFFIX)(T0 + 0x08, 0); + glue(stl, MEMSUFFIX)(T0 + 0x0C, 0); + glue(stl, MEMSUFFIX)(T0 + 0x10, 0); + glue(stl, MEMSUFFIX)(T0 + 0x14, 0); + glue(stl, MEMSUFFIX)(T0 + 0x18, 0); + glue(stl, MEMSUFFIX)(T0 + 0x1C, 0); RETURN(); } /* External access */ PPC_OP(glue(eciwx, MEMSUFFIX)) { - T1 = glue(ldl, MEMSUFFIX)((void *)T0); + T1 = glue(ldl, MEMSUFFIX)(T0); RETURN(); } PPC_OP(glue(ecowx, MEMSUFFIX)) { - glue(stl, MEMSUFFIX)((void *)T0, T1); + glue(stl, MEMSUFFIX)(T0, T1); RETURN(); } diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 4647c6e066..3974ecc732 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -131,7 +131,7 @@ static uint8_t spr_access[1024 / 2]; /* internal defines */ typedef struct DisasContext { struct TranslationBlock *tb; - uint32_t nip; + target_ulong nip; uint32_t opcode; uint32_t exception; /* Execution mode */ @@ -3029,7 +3029,7 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, { DisasContext ctx, *ctxp = &ctx; opc_handler_t **table, *handler; - uint32_t pc_start; + target_ulong pc_start; uint16_t *gen_opc_end; int j, lj = -1; @@ -3069,7 +3069,7 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, ctx.nip, 1 - msr_pr, msr_ir); } #endif - ctx.opcode = ldl_code((void *)ctx.nip); + ctx.opcode = ldl_code(ctx.nip); #if defined PPC_DEBUG_DISAS if (loglevel & CPU_LOG_TB_IN_ASM) { fprintf(logfile, "translate opcode %08x (%02x %02x %02x)\n", @@ -3174,8 +3174,8 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, cpu_dump_state(env, logfile, fprintf, 0); } if (loglevel & CPU_LOG_TB_IN_ASM) { - fprintf(logfile, "IN: %s\n", lookup_symbol((void *)pc_start)); - disas(logfile, (void *)pc_start, ctx.nip - pc_start, 0, 0); + fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); + target_disas(logfile, pc_start, ctx.nip - pc_start, 0); fprintf(logfile, "\n"); } if (loglevel & CPU_LOG_TB_OP) { |