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authorTom Musta <tommusta@gmail.com>2013-10-22 22:08:32 +1100
committerAlexander Graf <agraf@suse.de>2013-12-20 01:57:50 +0100
commit304af367427301697df32112c50448b7d55c7054 (patch)
tree71ba74886d305dbc51bd59001cc8e64537567a77 /target-ppc/translate.c
parent472b24ce2b4f22363ec9a556e479be6ad5180727 (diff)
Add lxvd2x
This patch adds the lxvd2x instruction. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r--target-ppc/translate.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 269fdad6b2..f00b606264 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7003,6 +7003,22 @@ static inline TCGv_i64 cpu_vsrl(int n)
}
}
+static void gen_lxvd2x(DisasContext *ctx)
+{
+ TCGv EA;
+ if (unlikely(!ctx->vsx_enabled)) {
+ gen_exception(ctx, POWERPC_EXCP_VSXU);
+ return;
+ }
+ gen_set_access_type(ctx, ACCESS_INT);
+ EA = tcg_temp_new();
+ gen_addr_reg_index(ctx, EA);
+ gen_qemu_ld64(ctx, cpu_vsrh(xT(ctx->opcode)), EA);
+ tcg_gen_addi_tl(EA, EA, 8);
+ gen_qemu_ld64(ctx, cpu_vsrl(xT(ctx->opcode)), EA);
+ tcg_temp_free(EA);
+}
+
/*** SPE extension ***/
/* Register moves */
@@ -9452,6 +9468,8 @@ GEN_VAFORM_PAIRED(vmsumshm, vmsumshs, 20),
GEN_VAFORM_PAIRED(vsel, vperm, 21),
GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23),
+GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX),
+
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)