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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-04 01:50:03 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-04 01:50:03 +0000
commite57448f11cb29c9b36acd117349070fe290465fa (patch)
tree5f14617c55763968fd137b3a3552c9bdd8385ed5 /target-ppc/op_helper_mem.h
parentd63001d11434fc6bf217255b51f625a75d05fb35 (diff)
More cache tuning fixes:
* fix the tunable cache line size probe for PowerPC 970. * initialize HID5 so cache line is 32 bytes long when running in user-mode only git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op_helper_mem.h')
-rw-r--r--target-ppc/op_helper_mem.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/op_helper_mem.h b/target-ppc/op_helper_mem.h
index f5cb6970c4..4b0bb841e5 100644
--- a/target-ppc/op_helper_mem.h
+++ b/target-ppc/op_helper_mem.h
@@ -324,7 +324,7 @@ void glue(do_dcbz_64, MEMSUFFIX) (void)
int dcache_line_size = env->dcache_line_size;
/* XXX: should be 970 specific (?) */
- if (((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1)
+ if (((env->spr[SPR_970_HID5] >> 6) & 0x3) == 0x2)
dcache_line_size = 32;
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);