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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-22 22:41:50 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-22 22:41:50 +0000
commit51789c410beb34423b1188a6b6e069fe8b68aebe (patch)
treed7b4cb00c83b263006de65a44f09fc1d764663f6 /target-ppc/op.c
parente864cabdc0a38bb598ddcf88b264896dc6f3e3b2 (diff)
PowerPC improvments:
- add missing 64 bits rotate instructions - safely define TARGET_PPCSPE when 64 bits registers are used a separate target will be needed to use it in 32 bits mode on 32 bits hosts. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2527 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/op.c')
-rw-r--r--target-ppc/op.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/target-ppc/op.c b/target-ppc/op.c
index 068ccb53b2..1e0584209e 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -1444,6 +1444,20 @@ void OPPROTO op_rotli32_T0 (void)
RETURN();
}
+#if defined(TARGET_PPC64)
+void OPPROTO op_rotl64_T0_T1 (void)
+{
+ T0 = rotl64(T0, T1 & 0x3F);
+ RETURN();
+}
+
+void OPPROTO op_rotli64_T0 (void)
+{
+ T0 = rotl64(T0, PARAM1);
+ RETURN();
+}
+#endif
+
/*** Integer shift ***/
/* shift left word */
void OPPROTO op_slw (void)