From 51789c410beb34423b1188a6b6e069fe8b68aebe Mon Sep 17 00:00:00 2001
From: j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Thu, 22 Mar 2007 22:41:50 +0000
Subject: PowerPC improvments: - add missing 64 bits rotate instructions -
 safely define TARGET_PPCSPE when 64 bits registers are used   a separate
 target will be needed to use it in 32 bits mode on 32 bits hosts.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2527 c046a42c-6fe2-441c-8c8c-71466251a162
---
 target-ppc/op.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

(limited to 'target-ppc/op.c')

diff --git a/target-ppc/op.c b/target-ppc/op.c
index 068ccb53b2..1e0584209e 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -1444,6 +1444,20 @@ void OPPROTO op_rotli32_T0 (void)
     RETURN();
 }
 
+#if defined(TARGET_PPC64)
+void OPPROTO op_rotl64_T0_T1 (void)
+{
+    T0 = rotl64(T0, T1 & 0x3F);
+    RETURN();
+}
+
+void OPPROTO op_rotli64_T0 (void)
+{
+    T0 = rotl64(T0, PARAM1);
+    RETURN();
+}
+#endif
+
 /***                             Integer shift                             ***/
 /* shift left word */
 void OPPROTO op_slw (void)
-- 
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