PowerPC 601 need specific callbacks for its BATs setup.

Implement PowerPC 601 HID0 register, needed for little-endian mode support.
As a consequence, we need to merge hflags coming from MSR with other ones.
Use little-endian mode from hflags instead of MSR during code translation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3524 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 14 insertions, 5 deletions

diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index 2a5de2ed15..c52ae9ebc6 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -58,6 +58,17 @@ static always_inline void hreg_swap_gpr_tgpr (CPUPPCState *env)
     env->tgpr[3] = tmp;
 }
 
+static always_inline void hreg_compute_mem_idx (CPUPPCState *env)
+{
+#if defined (TARGET_PPC64H)
+    /* Precompute MMU index */
+    if (msr_pr == 0 && msr_hv != 0)
+        env->mmu_idx = 2;
+    else
+#endif
+        env->mmu_idx = 1 - msr_pr;
+}
+
 static always_inline void hreg_compute_hflags (CPUPPCState *env)
 {
     target_ulong hflags_mask;
@@ -70,14 +81,12 @@ static always_inline void hreg_compute_hflags (CPUPPCState *env)
     hflags_mask |= (1ULL << MSR_CM) | (1ULL << MSR_SF);
 #if defined (TARGET_PPC64H)
     hflags_mask |= 1ULL << MSR_HV;
-    /* Precompute MMU index */
-    if (msr_pr == 0 && msr_hv != 0)
-        env->mmu_idx = 2;
-    else
 #endif
 #endif
-        env->mmu_idx = 1 - msr_pr;
+    hreg_compute_mem_idx(env);
     env->hflags = env->msr & hflags_mask;
+    /* Merge with hflags coming from other registers */
+    env->hflags |= env->hflags_nmsr;
 }
 
 static always_inline int hreg_store_msr (CPUPPCState *env, target_ulong value)