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authorYongbok Kim <yongbok.kim@imgtec.com>2015-06-29 10:11:23 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2015-07-15 14:07:10 +0100
commit4dc89b782095d7a0b919fafd7b1322b3cb1279f1 (patch)
treee932c19446a945043b4f9204708e3bd1bd486b1b /target-mips/mips-defs.h
parent661725da09f47eb92d356fac10a4cf3b7ad1f61d (diff)
target-mips: fix MIPS64R6-generic configuration
Fix core configuration for MIPS64R6-generic to make it as close as I6400. I6400 core has 48-bit of Virtual Address available (SEGBITS). MIPS SIMD Architecture is available. Rearrange order of bits to match the specification. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/mips-defs.h')
-rw-r--r--target-mips/mips-defs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index 20aa87c24c..53b185ebd3 100644
--- a/target-mips/mips-defs.h
+++ b/target-mips/mips-defs.h
@@ -11,7 +11,7 @@
#if defined(TARGET_MIPS64)
#define TARGET_LONG_BITS 64
#define TARGET_PHYS_ADDR_SPACE_BITS 48
-#define TARGET_VIRT_ADDR_SPACE_BITS 42
+#define TARGET_VIRT_ADDR_SPACE_BITS 48
#else
#define TARGET_LONG_BITS 32
#define TARGET_PHYS_ADDR_SPACE_BITS 40