From 4dc89b782095d7a0b919fafd7b1322b3cb1279f1 Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Mon, 29 Jun 2015 10:11:23 +0100 Subject: target-mips: fix MIPS64R6-generic configuration Fix core configuration for MIPS64R6-generic to make it as close as I6400. I6400 core has 48-bit of Virtual Address available (SEGBITS). MIPS SIMD Architecture is available. Rearrange order of bits to match the specification. Signed-off-by: Yongbok Kim Reviewed-by: Aurelien Jarno Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/mips-defs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target-mips/mips-defs.h') diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h index 20aa87c24c..53b185ebd3 100644 --- a/target-mips/mips-defs.h +++ b/target-mips/mips-defs.h @@ -11,7 +11,7 @@ #if defined(TARGET_MIPS64) #define TARGET_LONG_BITS 64 #define TARGET_PHYS_ADDR_SPACE_BITS 48 -#define TARGET_VIRT_ADDR_SPACE_BITS 42 +#define TARGET_VIRT_ADDR_SPACE_BITS 48 #else #define TARGET_LONG_BITS 32 #define TARGET_PHYS_ADDR_SPACE_BITS 40 -- cgit v1.2.3