aboutsummaryrefslogtreecommitdiff
path: root/target-mips/cpu.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2015-10-22 17:33:54 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-10-22 17:33:54 +0100
commitb803894e2c4d744ccc113ca6cbe6654ec80c1dc6 (patch)
treeaed47a20518d0623449f3c642bc69f5b4bdecea8 /target-mips/cpu.c
parentca3e40e233e87f7b29442311736a82da01c0df7b (diff)
parent0960be7cffa7b30189f2f0f76b1ac3c8115660f3 (diff)
Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into staging
QOM CPUState and X86CPU * Adoption of CPUClass::disas_set_info() hook # gpg: Signature made Thu 22 Oct 2015 17:11:24 BST using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-cpu-for-peter: disas: QOMify alpha specific disas setup disas: QOMify mips specific disas setup disas: QOMify sh4 specific disas setup disas: QOMify lm32 specific disas setup disas: QOMify sparc specific disas setup disas: QOMify m68k specific disas setup disas: QOMify moxie specific disas setup disas: QOMify s390x specific disas setup Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-mips/cpu.c')
-rw-r--r--target-mips/cpu.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 7fe1f0407f..37880d20e0 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -97,6 +97,14 @@ static void mips_cpu_reset(CPUState *s)
#endif
}
+static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) {
+#ifdef TARGET_WORDS_BIGENDIAN
+ info->print_insn = print_insn_big_mips;
+#else
+ info->print_insn = print_insn_little_mips;
+#endif
+}
+
static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -150,6 +158,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->get_phys_page_debug = mips_cpu_get_phys_page_debug;
cc->vmsd = &vmstate_mips_cpu;
#endif
+ cc->disas_set_info = mips_cpu_disas_set_info;
cc->gdb_num_core_regs = 73;
cc->gdb_stop_before_watchpoint = true;