diff options
| author | Blue Swirl <blauwirbel@gmail.com> | 2010-03-18 18:41:57 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2010-03-18 18:41:57 +0000 |
| commit | 43dc2a645e00e6761a741e3d16c27c5b5a373b66 (patch) | |
| tree | daf9f3fd9fa34306ac03fbb6efc72860efc879ca /target-cris | |
| parent | 609c1daced7f444f9f6569bba72d6a56a697ac95 (diff) | |
Replace assert(0) with abort() or cpu_abort()
When building with -DNDEBUG, assert(0) will not stop execution
so it must not be used for abnormal termination.
Use cpu_abort() when in CPU context, abort() otherwise.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-cris')
| -rw-r--r-- | target-cris/helper.c | 2 | ||||
| -rw-r--r-- | target-cris/translate_v10.c | 16 |
2 files changed, 10 insertions, 8 deletions
diff --git a/target-cris/helper.c b/target-cris/helper.c index fcdcf977fe..240bda056a 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -138,7 +138,7 @@ static void do_interruptv10(CPUState *env) break; case EXCP_BUSFAULT: - assert(0); + cpu_abort(env, "Unhandled busfault"); break; default: diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 564cdb009d..14e590da3c 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -285,7 +285,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc) default: LOG_DIS("pc=%x mode=%x quickimm %d r%d r%d\n", dc->pc, dc->mode, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled quickimm\n"); break; } return 2; @@ -594,7 +594,9 @@ static unsigned int dec10_reg(DisasContext *dc) case 4: tmp = 2; break; case 2: tmp = 1; break; case 1: tmp = 0; break; - default: assert(0); break; + default: + cpu_abort(dc->env, "Unhandled BIAP"); + break; } t = tcg_temp_new(); @@ -611,7 +613,7 @@ static unsigned int dec10_reg(DisasContext *dc) default: LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } } else { @@ -687,7 +689,7 @@ static unsigned int dec10_reg(DisasContext *dc) default: LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } } @@ -945,7 +947,7 @@ static int dec10_bdap_m(DisasContext *dc, int size) if (!dc->postinc && (dc->ir & (1 << 11))) { int simm = dc->ir & 0xff; - // assert(0); + /* cpu_abort(dc->env, "Unhandled opcode"); */ /* sign extended. */ simm = (int8_t)simm; @@ -1044,7 +1046,7 @@ static unsigned int dec10_ind(DisasContext *dc) default: LOG_DIS("pc=%x var-ind.%d %d r%d r%d\n", dc->pc, size, dc->opcode, dc->src, dc->dst); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } return insn_len; @@ -1136,7 +1138,7 @@ static unsigned int dec10_ind(DisasContext *dc) break; default: LOG_DIS("ERROR pc=%x opcode=%d\n", dc->pc, dc->opcode); - assert(0); + cpu_abort(dc->env, "Unhandled opcode"); break; } |