diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2016-03-04 11:30:19 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-03-04 11:30:19 +0000 |
| commit | f9fd40ebe4f55e0048e002925b8d65e66d56e7a7 (patch) | |
| tree | 17f72ea122a29d8d141271b7387e26e852bd5a77 /target-arm/cpu.c | |
| parent | 49017bd8b4395ba380c45c2fc41f4353fc2f0f06 (diff) | |
target-arm: implement SCTLR.B, drop bswap_code
bswap_code is a CPU property of sorts ("is the iside endianness the
opposite way round to TARGET_WORDS_BIGENDIAN?") but it is not the
actual CPU state involved here which is SCTLR.B (set for BE32
binaries, clear for BE8).
Replace bswap_code with SCTLR.B, and pass that to arm_ld*_code.
The next patches will make data fetches honor both SCTLR.B and
CPSR.E appropriately.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[PC changes:
* rebased on master (Jan 2016)
* s/TARGET_USER_ONLY/CONFIG_USER_ONLY
* Use bswap_code() for disas_set_info() instead of raw sctlr_b
]
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.c')
| -rw-r--r-- | target-arm/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index e95b0307a6..001fccf481 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -427,7 +427,7 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info) } else { info->print_insn = print_insn_arm; } - if (env->bswap_code) { + if (bswap_code(arm_sctlr_b(env))) { #ifdef TARGET_WORDS_BIGENDIAN info->endian = BFD_ENDIAN_LITTLE; #else |