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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-08-04 15:01:38 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-08-04 15:01:38 +0100 |
| commit | 69f87f713069f1f70f86cb65883f7d43e3aa21de (patch) | |
| tree | 816428de782bde87199584b149b74a5203d1d245 /target-arm/cpu.c | |
| parent | cc11a0623ab4b16faa6945f1f6dedcb59f993b61 (diff) | |
| parent | dbb1fb277ca12acd577403575aa6a2f119ab79ea (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140804' into staging
target-arm queue:
* Set PC correctly when loading AArch64 ELF files
* sdhci: Fix ADMA dma_memory_read access
* some more foundational work for EL2/EL3 support
* fix bugs which reveal themselves if the TARGET_PAGE_SIZE
is not set to 1K
# gpg: Signature made Mon 04 Aug 2014 14:51:34 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20140804:
target-arm: A64: fix TLB flush instructions
target-arm: don't hardcode mask values in arm_cpu_handle_mmu_fault
target-arm: Fix bit test in sp_el0_access
target-arm: Add FAR_EL2 and 3
target-arm: Add ESR_EL2 and 3
target-arm: Make far_el1 an array
target-arm: A64: Respect SPSEL when taking exceptions
target-arm: A64: Respect SPSEL in ERET SP restore
target-arm: A64: Break out aarch64_save/restore_sp
sd: sdhci: Fix ADMA dma_memory_read access
hw/arm/virt: formatting: memory map
hw/arm/boot: Set PC correctly when loading AArch64 ELF files
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.c')
| -rw-r--r-- | target-arm/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 05e52e0e83..7cebb76656 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -447,7 +447,7 @@ static void arm1026_initfn(Object *obj) ARMCPRegInfo ifar = { .name = "IFAR", .cp = 15, .crn = 6, .crm = 0, .opc1 = 0, .opc2 = 1, .access = PL1_RW, - .fieldoffset = offsetofhigh32(CPUARMState, cp15.far_el1), + .fieldoffset = offsetofhigh32(CPUARMState, cp15.far_el[1]), .resetvalue = 0 }; define_one_arm_cp_reg(cpu, &ifar); |